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ARM: dts: stm32: add stm32mp157f-dk2 board support
STM32MP157F-DK2 board embeds a STM32MP157F SoC. This SoC contains the same level of feature than a STM32MP157C SOC but A7 clock frequency can reach 800MHz, hence the inclusion of the newly introduced stm32mp15xf.dtsi. As for other latest STM32 MPU families, STM32MP157F-DK2 relies on OP-TEE SCMI services for SoC clock and reset controllers resources, and for PMIC, now under OP-TEE control. That's why stm32mp157f-dk2-scmi.dtsi is introduced, to move all clocks, resets and regulators to SCMI-based ones. To "disable" SCMI, just need to comment stm32mp157f-dk2-scmi.dtsi inclusion and to replace &scmi_v3v3 with &v3v3, then to disable arm_wdt and to enable i2c4 and its subnodes for PMIC support by Linux. Reconfigure usbotg for dual role with type-C support if needed. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-7-5be0854a9299@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
Amelie Delaunay
Alexandre Torgue
parent
ef21a063d1
commit
fadfd41a49
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@ -72,7 +72,8 @@ dtb-$(CONFIG_ARCH_STM32) += \
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stm32mp157c-odyssey.dtb \
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stm32mp157c-osd32mp1-red.dtb \
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stm32mp157c-phycore-stm32mp1-3.dtb \
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stm32mp157c-ultra-fly-sbc.dtb
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stm32mp157c-ultra-fly-sbc.dtb \
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stm32mp157f-dk2.dtb
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dtb-$(CONFIG_ARCH_U8500) += \
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ste-snowball.dtb \
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ste-hrefprev60-stuib.dtb \
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196
arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi
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196
arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi
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@ -0,0 +1,196 @@
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2025 - All Rights Reserved
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* Author: Amelie Delaunay <amelie.delaunay@foss.st.com> for STMicroelectronics.
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*/
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#include "stm32mp15-scmi.dtsi"
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/ {
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reserved-memory {
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optee@de000000 {
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reg = <0xde000000 0x2000000>;
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no-map;
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};
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};
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arm_wdt: watchdog {
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compatible = "arm,smc-wdt";
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arm,smc-id = <0xbc000000>;
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status = "disabled";
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};
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};
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&adc {
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vdd-supply = <&scmi_vdd>;
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vdda-supply = <&scmi_vdd>;
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};
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&cpu0 {
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clocks = <&scmi_clk CK_SCMI_MPU>;
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};
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&cpu1 {
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clocks = <&scmi_clk CK_SCMI_MPU>;
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};
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&cryp1 {
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clocks = <&scmi_clk CK_SCMI_CRYP1>;
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resets = <&scmi_reset RST_SCMI_CRYP1>;
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};
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&cs42l51 {
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VL-supply = <&scmi_v3v3>;
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VD-supply = <&scmi_v1v8_audio>;
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VA-supply = <&scmi_v1v8_audio>;
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VAHP-supply = <&scmi_v1v8_audio>;
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};
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&dsi {
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phy-dsi-supply = <&scmi_reg18>;
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clocks = <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
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};
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&gpioz {
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clocks = <&scmi_clk CK_SCMI_GPIOZ>;
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};
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&hash1 {
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clocks = <&scmi_clk CK_SCMI_HASH1>;
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resets = <&scmi_reset RST_SCMI_HASH1>;
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};
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&i2c1 {
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hdmi-transmitter@39 {
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iovcc-supply = <&scmi_v3v3_hdmi>;
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cvcc12-supply = <&scmi_v1v2_hdmi>;
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};
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};
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&iwdg2 {
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clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
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status = "disabled";
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};
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&m4_rproc {
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/delete-property/ st,syscfg-holdboot;
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resets = <&scmi_reset RST_SCMI_MCU>,
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<&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
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reset-names = "mcu_rst", "hold_boot";
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};
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&mdma1 {
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resets = <&scmi_reset RST_SCMI_MDMA>;
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};
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&optee {
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interrupt-parent = <&intc>;
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interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
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};
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&pwr_regulators {
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vdd-supply = <&scmi_vdd>;
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vdd_3v3_usbfs-supply = <&scmi_vdd_usb>;
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status = "disabled";
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};
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&rcc {
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compatible = "st,stm32mp1-rcc-secure", "syscon";
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clock-names = "hse", "hsi", "csi", "lse", "lsi";
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clocks = <&scmi_clk CK_SCMI_HSE>,
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<&scmi_clk CK_SCMI_HSI>,
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<&scmi_clk CK_SCMI_CSI>,
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<&scmi_clk CK_SCMI_LSE>,
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<&scmi_clk CK_SCMI_LSI>;
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};
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&rng1 {
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clocks = <&scmi_clk CK_SCMI_RNG1>;
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resets = <&scmi_reset RST_SCMI_RNG1>;
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};
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&rtc {
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clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
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};
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&scmi_reguls {
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scmi_vddcore: regulator@3 {
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reg = <VOLTD_SCMI_STPMIC1_BUCK1>;
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regulator-name = "vddcore";
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};
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scmi_vdd: regulator@5 {
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reg = <VOLTD_SCMI_STPMIC1_BUCK3>;
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regulator-name = "vdd";
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};
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scmi_v3v3: regulator@6 {
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reg = <VOLTD_SCMI_STPMIC1_BUCK4>;
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regulator-name = "v3v3";
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};
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scmi_v1v8_audio: regulator@7 {
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reg = <VOLTD_SCMI_STPMIC1_LDO1>;
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regulator-name = "v1v8_audio";
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};
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scmi_v3v3_hdmi: regulator@8 {
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reg = <VOLTD_SCMI_STPMIC1_LDO2>;
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regulator-name = "v3v3_hdmi";
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};
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scmi_vdd_usb: regulator@a {
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reg = <VOLTD_SCMI_STPMIC1_LDO4>;
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regulator-name = "vdd_usb";
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};
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scmi_vdda: regulator@b {
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reg = <VOLTD_SCMI_STPMIC1_LDO5>;
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regulator-name = "vdda";
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};
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scmi_v1v2_hdmi: regulator@c {
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reg = <VOLTD_SCMI_STPMIC1_LDO6>;
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regulator-name = "v1v2_hdmi";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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scmi_vbus_otg: regulator@f {
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reg = <VOLTD_SCMI_STPMIC1_PWR_SW1>;
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regulator-name = "vbus_otg";
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};
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scmi_vbus_sw: regulator@10 {
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reg = <VOLTD_SCMI_STPMIC1_PWR_SW2>;
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regulator-name = "vbus_sw";
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};
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};
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&sdmmc1 {
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vmmc-supply = <&scmi_v3v3>;
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};
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&sdmmc3 {
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vmmc-supply = <&scmi_v3v3>;
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};
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&usbh_ehci {
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hub@1 {
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vdd-supply = <&scmi_v3v3>;
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};
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};
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&usbphyc_port0 {
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phy-supply = <&scmi_vdd_usb>;
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};
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&usbphyc_port1 {
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phy-supply = <&scmi_vdd_usb>;
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};
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&vrefbuf {
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vdda-supply = <&scmi_vdd>;
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};
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179
arch/arm/boot/dts/st/stm32mp157f-dk2.dts
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179
arch/arm/boot/dts/st/stm32mp157f-dk2.dts
Normal file
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@ -0,0 +1,179 @@
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2025 - All Rights Reserved
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* Author: Amelie Delaunay <amelie.delaunay@foss.st.com> for STMicroelectronics.
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*/
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/dts-v1/;
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#include "stm32mp157.dtsi"
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#include "stm32mp15xf.dtsi"
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#include "stm32mp15-pinctrl.dtsi"
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#include "stm32mp15xxac-pinctrl.dtsi"
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#include "stm32mp15xx-dkx.dtsi"
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#include "stm32mp157f-dk2-scmi.dtsi"
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/ {
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model = "STMicroelectronics STM32MP157F-DK2 Discovery Board";
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compatible = "st,stm32mp157f-dk2", "st,stm32mp157";
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aliases {
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ethernet0 = ðernet0;
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serial3 = &usart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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wifi_pwrseq: wifi-pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&gpioh 4 GPIO_ACTIVE_LOW>;
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};
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};
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&arm_wdt {
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timeout-sec = <32>;
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status = "okay";
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};
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&cryp1 {
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status = "okay";
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};
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&dsi {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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panel@0 {
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compatible = "orisetech,otm8009a";
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reg = <0>;
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reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
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power-supply = <&scmi_v3v3>;
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status = "okay";
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port {
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panel_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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};
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};
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&dsi_in {
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remote-endpoint = <<dc_ep1_out>;
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};
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&dsi_out {
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remote-endpoint = <&panel_in>;
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};
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&i2c1 {
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touchscreen@38 {
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compatible = "focaltech,ft6236";
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reg = <0x38>;
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interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
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interrupt-parent = <&gpiof>;
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touchscreen-size-x = <480>;
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touchscreen-size-y = <800>;
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status = "okay";
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};
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};
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/* I2C4 is managed by OP-TEE */
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&i2c4 {
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status = "disabled";
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/* i2c4 subnodes, which won't be managed by Linux */
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typec@28 {
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status = "disabled";
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connector {
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status = "disabled";
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};
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};
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stpmic@33 {
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status = "disabled";
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};
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};
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<dc {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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ltdc_ep1_out: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&dsi_in>;
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};
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};
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};
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&rtc {
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pinctrl-names = "default";
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pinctrl-0 = <&rtc_rsvd_pins_a>;
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rtc_lsco_pins_a: rtc-lsco-0 {
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pins = "out2_rmp";
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function = "lsco";
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};
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};
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/* Wifi */
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&sdmmc2 {
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pinctrl-names = "default", "opendrain", "sleep";
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pinctrl-0 = <&sdmmc2_b4_pins_a>;
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pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
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pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
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non-removable;
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cap-sdio-irq;
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st,neg-edge;
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bus-width = <4>;
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vmmc-supply = <&scmi_v3v3>;
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mmc-pwrseq = <&wifi_pwrseq>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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brcmf: wifi@1 {
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reg = <1>;
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compatible = "brcm,bcm4329-fmac";
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pinctrl-names = "default";
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pinctrl-0 = <&rtc_lsco_pins_a>;
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};
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};
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/* Bluetooth */
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&usart2 {
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pinctrl-names = "default", "sleep", "idle";
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pinctrl-0 = <&usart2_pins_c>;
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pinctrl-1 = <&usart2_sleep_pins_c>;
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pinctrl-2 = <&usart2_idle_pins_c>;
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uart-has-rtscts;
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status = "okay";
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bluetooth {
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shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
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compatible = "brcm,bcm43438-bt";
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max-speed = <3000000>;
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vbat-supply = <&scmi_v3v3>;
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vddio-supply = <&scmi_v3v3>;
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};
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};
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/* Since I2C4 is disabled, STUSB1600 is also disabled so there is no Type-C support */
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&usbotg_hs {
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dr_mode = "peripheral";
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role-switch-default-mode = "peripheral";
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/*
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* Forcing dr_mode = "peripheral"/"role-switch-default-mode = "peripheral";
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* will cause the pull-up on D+/D- to be raised as soon as the OTG is configured at runtime,
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* regardless of the presence of VBUS. Notice that on self-powered devices like
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* stm32mp157f-dk2, this isn't compliant with the USB standard. That's why usbotg_hs is kept
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* disabled here.
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*/
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status = "disabled";
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};
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