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drm/amdgpu: add the macro definition of UMC_V12_0_PER_CHANNEL_OFFSET

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Add the macro definition of UMC_V12_0_PER_CHANNEL_OFFSET for subsequent
use.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Ce Sun <cesun102@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Ce Sun 2026-02-26 15:16:34 +08:00 committed by Alex Deucher
parent b139096367
commit fab755988b
1 changed files with 2 additions and 0 deletions
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drivers/gpu/drm/amd/ras/rascore/ras_umc_v12_0.h
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@ -290,6 +290,8 @@
/* R13 bit shift should be considered, double the number */
#define UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL (UMC_V12_0_NA_MAP_PA_NUM * 2)
/* UMC register per channel offset */
#define UMC_V12_0_PER_CHANNEL_OFFSET 0x400
/* C2, C3, C4, R13, four MCA bits are looped in page retirement */
#define UMC_V12_0_RETIRE_LOOP_BITS 4