media: iris: implement iris v4l2 file ops

Implement open, close and poll ops.

Open:
Configure the vb2 queue and v4l2 file handler. Allocate a video instance
and add the instance to core instance list.

Close:
Free the instance and remove it from core instance list.

Poll:
Wait for an event on vb2 src and vb2 dst queues.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl>
Tested-by: Stefan Schmidt <stefan.schmidt@linaro.org> # x1e80100 (Dell XPS 13 9345)
Reviewed-by: Stefan Schmidt <stefan.schmidt@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
This commit is contained in:
Dikshita Agarwal 2025-02-07 13:24:43 +05:30 committed by Hans Verkuil
parent 38506cb7e8
commit fa186c97e3
13 changed files with 264 additions and 1 deletions

View File

@ -2,6 +2,7 @@ config VIDEO_QCOM_IRIS
tristate "Qualcomm iris V4L2 decoder driver"
depends on VIDEO_DEV
depends on ARCH_QCOM || COMPILE_TEST
select V4L2_MEM2MEM_DEV
help
This is a V4L2 driver for Qualcomm iris video accelerator
hardware. It accelerates decoding operations on various

View File

@ -1,4 +1,7 @@
iris-objs += iris_platform_sm8550.o \
iris-objs += iris_hfi_gen1_command.o \
iris_hfi_gen2_command.o \
iris_platform_sm8550.o \
iris_probe.o \
iris_vidc.o \
obj-$(CONFIG_VIDEO_QCOM_IRIS) += iris.o

View File

@ -25,6 +25,7 @@ struct icc_info {
* @irq: iris irq
* @v4l2_dev: a holder for v4l2 device structure
* @vdev_dec: iris video device structure for decoder
* @iris_v4l2_file_ops: iris v4l2 file ops
* @icc_tbl: table of iris interconnects
* @icc_count: count of iris interconnects
* @pmdomain_tbl: table of iris power domains
@ -41,6 +42,7 @@ struct iris_core {
int irq;
struct v4l2_device v4l2_dev;
struct video_device *vdev_dec;
const struct v4l2_file_operations *iris_v4l2_file_ops;
struct icc_bulk_data *icc_tbl;
u32 icc_count;
struct dev_pm_domain_list *pmdomain_tbl;

View File

@ -0,0 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __IRIS_HFI_GEN1_H__
#define __IRIS_HFI_GEN1_H__
struct iris_inst;
struct iris_inst *iris_hfi_gen1_get_instance(void);
#endif

View File

@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "iris_hfi_gen1.h"
#include "iris_instance.h"
struct iris_inst *iris_hfi_gen1_get_instance(void)
{
return kzalloc(sizeof(struct iris_inst), GFP_KERNEL);
}

View File

@ -0,0 +1,22 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __IRIS_HFI_GEN2_H__
#define __IRIS_HFI_GEN2_H__
#include "iris_instance.h"
/**
* struct iris_inst_hfi_gen2 - holds per video instance parameters for hfi_gen2
*
* @inst: pointer to iris_instance structure
*/
struct iris_inst_hfi_gen2 {
struct iris_inst inst;
};
struct iris_inst *iris_hfi_gen2_get_instance(void);
#endif

View File

@ -0,0 +1,11 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "iris_hfi_gen2.h"
struct iris_inst *iris_hfi_gen2_get_instance(void)
{
return kzalloc(sizeof(struct iris_inst_hfi_gen2), GFP_KERNEL);
}

View File

@ -0,0 +1,31 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __IRIS_INSTANCE_H__
#define __IRIS_INSTANCE_H__
#include "iris_core.h"
/**
* struct iris_inst - holds per video instance parameters
*
* @core: pointer to core structure
* @ctx_q_lock: lock to serialize queues related ioctls
* @lock: lock to seralise forward and reverse threads
* @fh: reference of v4l2 file handler
* @m2m_dev: a reference to m2m device structure
* @m2m_ctx: a reference to m2m context structure
*/
struct iris_inst {
struct iris_core *core;
struct mutex ctx_q_lock;/* lock to serialize queues related ioctls */
struct mutex lock; /* lock to serialize forward and reverse threads */
struct v4l2_fh fh;
struct v4l2_m2m_dev *m2m_dev;
struct v4l2_m2m_ctx *m2m_ctx;
};
#endif

View File

@ -20,6 +20,7 @@ struct platform_clk_data {
};
struct iris_platform_data {
struct iris_inst *(*get_instance)(void);
const struct icc_info *icc_tbl;
unsigned int icc_tbl_size;
const char * const *pmdomain_tbl;

View File

@ -4,6 +4,7 @@
*/
#include "iris_core.h"
#include "iris_hfi_gen2.h"
#include "iris_platform_common.h"
static const struct icc_info sm8550_icc_table[] = {
@ -24,6 +25,7 @@ static const struct platform_clk_data sm8550_clk_table[] = {
};
struct iris_platform_data sm8550_data = {
.get_instance = iris_hfi_gen2_get_instance,
.icc_tbl = sm8550_icc_table,
.icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
.clk_rst_tbl = sm8550_clk_reset_table,

View File

@ -11,6 +11,7 @@
#include <linux/reset.h>
#include "iris_core.h"
#include "iris_vidc.h"
static int iris_init_icc(struct iris_core *core)
{
@ -139,6 +140,7 @@ static int iris_register_video_device(struct iris_core *core)
strscpy(vdev->name, "qcom-iris-decoder", sizeof(vdev->name));
vdev->release = video_device_release;
vdev->fops = core->iris_v4l2_file_ops;
vdev->vfl_dir = VFL_DIR_M2M;
vdev->v4l2_dev = &core->v4l2_dev;
vdev->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING;
@ -192,6 +194,7 @@ static int iris_probe(struct platform_device *pdev)
core->iris_platform_data = of_device_get_match_data(core->dev);
iris_init_ops(core);
ret = iris_init_resources(core);
if (ret)
return ret;

View File

@ -0,0 +1,147 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <media/v4l2-ioctl.h>
#include <media/v4l2-mem2mem.h>
#include "iris_vidc.h"
#include "iris_instance.h"
#include "iris_platform_common.h"
#define IRIS_DRV_NAME "iris_driver"
#define IRIS_BUS_NAME "platform:iris_icc"
#define STEP_WIDTH 1
#define STEP_HEIGHT 1
static void iris_v4l2_fh_init(struct iris_inst *inst)
{
v4l2_fh_init(&inst->fh, inst->core->vdev_dec);
v4l2_fh_add(&inst->fh);
}
static void iris_v4l2_fh_deinit(struct iris_inst *inst)
{
v4l2_fh_del(&inst->fh);
v4l2_fh_exit(&inst->fh);
}
static inline struct iris_inst *iris_get_inst(struct file *filp, void *fh)
{
return container_of(filp->private_data, struct iris_inst, fh);
}
static void iris_m2m_device_run(void *priv)
{
}
static void iris_m2m_job_abort(void *priv)
{
struct iris_inst *inst = priv;
struct v4l2_m2m_ctx *m2m_ctx = inst->m2m_ctx;
v4l2_m2m_job_finish(inst->m2m_dev, m2m_ctx);
}
static const struct v4l2_m2m_ops iris_m2m_ops = {
.device_run = iris_m2m_device_run,
.job_abort = iris_m2m_job_abort,
};
static int
iris_m2m_queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
{
struct iris_inst *inst = priv;
int ret;
src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
src_vq->drv_priv = inst;
src_vq->dev = inst->core->dev;
src_vq->lock = &inst->ctx_q_lock;
ret = vb2_queue_init(src_vq);
if (ret)
return ret;
dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
dst_vq->io_modes = VB2_MMAP | VB2_DMABUF;
dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
dst_vq->drv_priv = inst;
dst_vq->dev = inst->core->dev;
dst_vq->lock = &inst->ctx_q_lock;
return vb2_queue_init(dst_vq);
}
int iris_open(struct file *filp)
{
struct iris_core *core = video_drvdata(filp);
struct iris_inst *inst;
int ret;
inst = core->iris_platform_data->get_instance();
if (!inst)
return -ENOMEM;
inst->core = core;
mutex_init(&inst->ctx_q_lock);
iris_v4l2_fh_init(inst);
inst->m2m_dev = v4l2_m2m_init(&iris_m2m_ops);
if (IS_ERR_OR_NULL(inst->m2m_dev)) {
ret = -EINVAL;
goto fail_v4l2_fh_deinit;
}
inst->m2m_ctx = v4l2_m2m_ctx_init(inst->m2m_dev, inst, iris_m2m_queue_init);
if (IS_ERR_OR_NULL(inst->m2m_ctx)) {
ret = -EINVAL;
goto fail_m2m_release;
}
inst->fh.m2m_ctx = inst->m2m_ctx;
filp->private_data = &inst->fh;
return 0;
fail_m2m_release:
v4l2_m2m_release(inst->m2m_dev);
fail_v4l2_fh_deinit:
iris_v4l2_fh_deinit(inst);
mutex_destroy(&inst->ctx_q_lock);
kfree(inst);
return ret;
}
int iris_close(struct file *filp)
{
struct iris_inst *inst = iris_get_inst(filp, NULL);
v4l2_m2m_ctx_release(inst->m2m_ctx);
v4l2_m2m_release(inst->m2m_dev);
iris_v4l2_fh_deinit(inst);
mutex_destroy(&inst->ctx_q_lock);
kfree(inst);
filp->private_data = NULL;
return 0;
}
static struct v4l2_file_operations iris_v4l2_file_ops = {
.owner = THIS_MODULE,
.open = iris_open,
.release = iris_close,
.unlocked_ioctl = video_ioctl2,
.poll = v4l2_m2m_fop_poll,
.mmap = v4l2_m2m_fop_mmap,
};
void iris_init_ops(struct iris_core *core)
{
core->iris_v4l2_file_ops = &iris_v4l2_file_ops;
}

View File

@ -0,0 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __IRIS_VIDC_H__
#define __IRIS_VIDC_H__
struct iris_core;
void iris_init_ops(struct iris_core *core);
int iris_open(struct file *filp);
int iris_close(struct file *filp);
#endif