github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-07-28 01:55:51 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

drm/amdgpu: add PTL enable/query gfx control support for GC 9.4.4

Browse Source 
Introduce hardware detection, runtime state tracking and a
kgd->ptl_ctrl() callback to enable/disable/query PTL via the
PSP performance-monitor interface (commands 0xA0000000/1).
The driver now exposes PTL capability to KFD and keeps the
software state in sync with the hardware.

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Perry Yuan 2026-02-09 00:42:03 +08:00 committed by Alex Deucher
parent 8ce9c73104
commit f9f9fe3a7e
1 changed files with 34 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
View File

@ -2374,11 +2374,43 @@ static int gfx_v9_4_3_hw_init(struct amdgpu_ip_block *ip_block)
return r;
}
static int gfx_v9_4_3_perf_monitor_ptl_init(struct amdgpu_device *adev, bool enable)
{
struct amdgpu_ptl *ptl = &adev->psp.ptl;
uint32_t ptl_state = enable ? 1 : 0;
uint32_t fmt1, fmt2;
int r;
if (!adev->psp.funcs)
return -EOPNOTSUPP;
if (!ptl->hw_supported) {
fmt1 = GFX_FTYPE_I8;
fmt2 = GFX_FTYPE_BF16;
} else {
fmt1 = ptl->fmt1;
fmt2 = ptl->fmt2;
}
/* initialize PTL with default formats: GFX_FTYPE_I8 & GFX_FTYPE_BF16 */
r = amdgpu_ptl_perf_monitor_ctrl(adev, PSP_PTL_PERF_MON_SET, &ptl_state,
&fmt1, &fmt2);
if (r)
return r;
ptl->hw_supported = true;
return 0;
}
static int gfx_v9_4_3_hw_fini(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
int i, num_xcc;
if (adev->psp.ptl.hw_supported)
gfx_v9_4_3_perf_monitor_ptl_init(adev, false);
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.bad_op_irq, 0);
@ -2553,6 +2585,8 @@ static int gfx_v9_4_3_late_init(struct amdgpu_ip_block *ip_block)
adev->gfx.ras->enable_watchdog_timer)
adev->gfx.ras->enable_watchdog_timer(adev);
gfx_v9_4_3_perf_monitor_ptl_init(adev, true);
return 0;
}