mirror of
https://github.com/torvalds/linux.git
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KVM/arm64 fixes for 7.3, round #2
- Take a reference on the last IRQ loaded into an LR to prevent it
from being freed while running the guest (Marc Zyngier)
- Ensure that the ITS MOVALL command only affects LPIs that were
previously affined to the source redistributor (Marc Zyngier)
- Fix + test for honoring the host's trap configuration when running
non-protected VMs while KVM is in protected mode (Fuad Tabba)
- Use the host stage-1 mapping granularity for VM_PFNMAP mappings at
stage-2 (Mostafa Saleh)
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Merge tag 'kvmarm-fixes-7.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 fixes for 7.3, round #2
- Take a reference on the last IRQ loaded into an LR to prevent it
from being freed while running the guest (Marc Zyngier)
- Ensure that the ITS MOVALL command only affects LPIs that were
previously affined to the source redistributor (Marc Zyngier)
- Fix + test for honoring the host's trap configuration when running
non-protected VMs while KVM is in protected mode (Fuad Tabba)
- Use the host stage-1 mapping granularity for VM_PFNMAP mappings at
stage-2 (Mostafa Saleh)
This commit is contained in:
Paolo Bonzini
commit
f9bfc323e7
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@ -2386,9 +2386,6 @@ int __init populate_nv_trap_config(void)
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print_nv_trap_error(fgt, "FGT bit is reserved", ret);
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}
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if (!cpus_have_final_cap(ARM64_HAS_FGT))
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continue;
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prev = xa_store(&sr_forward_xa, enc,
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xa_mk_value(tc.val), GFP_KERNEL);
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@ -12,6 +12,15 @@
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#include <nvhe/gfp.h>
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#include <nvhe/spinlock.h>
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/*
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* HCR_EL2 bits EL2 takes from the host on each entry, per VM type. The rest
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* are EL2's own and nothing the host sets there reaches the guest.
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*/
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#define PKVM_HCR_EL2_HOST_PVM (HCR_EL2_TWI | HCR_EL2_TWE | HCR_EL2_VSE)
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#define PKVM_HCR_EL2_HOST_NPVM (PKVM_HCR_EL2_HOST_PVM | HCR_EL2_VI | HCR_EL2_VF | \
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HCR_EL2_TVM | HCR_EL2_TID2 | HCR_EL2_TID4 | \
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HCR_EL2_TID5 | HCR_EL2_TTLBOS)
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/*
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* Holds the relevant data for maintaining the vcpu state completely at hyp.
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*/
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@ -216,6 +216,7 @@ static void sync_debug_state(struct pkvm_hyp_vcpu *hyp_vcpu)
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static void flush_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu)
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{
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struct kvm_vcpu *host_vcpu = hyp_vcpu->host_vcpu;
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u64 host_hcr_mask = PKVM_HCR_EL2_HOST_PVM;
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fpsimd_sve_flush();
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flush_debug_state(hyp_vcpu);
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@ -228,6 +229,7 @@ static void flush_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu)
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if (!pkvm_hyp_vcpu_is_protected(hyp_vcpu)) {
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if (vcpu_get_flag(host_vcpu, PKVM_HOST_STATE_DIRTY))
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flush_hyp_vcpu_state(hyp_vcpu);
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host_hcr_mask = PKVM_HCR_EL2_HOST_NPVM;
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} else {
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hyp_vcpu->vcpu.arch.ctxt = host_vcpu->arch.ctxt;
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}
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@ -241,9 +243,8 @@ static void flush_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu)
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* trap-control bit, so it must flow to the hyp vCPU alongside TWI/TWE
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* for the vSError to be delivered. sync_hyp_vcpu() reflects it back.
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*/
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hyp_vcpu->vcpu.arch.hcr_el2 &= ~(HCR_TWI | HCR_TWE | HCR_VSE);
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hyp_vcpu->vcpu.arch.hcr_el2 |= READ_ONCE(host_vcpu->arch.hcr_el2) &
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(HCR_TWI | HCR_TWE | HCR_VSE);
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hyp_vcpu->vcpu.arch.hcr_el2 &= ~host_hcr_mask;
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hyp_vcpu->vcpu.arch.hcr_el2 |= READ_ONCE(host_vcpu->arch.hcr_el2) & host_hcr_mask;
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hyp_vcpu->vcpu.arch.iflags = host_vcpu->arch.iflags;
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@ -30,6 +30,7 @@ unsigned int kvm_host_sve_max_vl;
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*/
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static DEFINE_PER_CPU(struct pkvm_hyp_vcpu *, loaded_hyp_vcpu);
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/* The PKVM_HCR_EL2_HOST_{PVM,NPVM} bits of this value come from the host on each entry. */
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static void pkvm_vcpu_reset_hcr(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS;
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@ -47,18 +48,17 @@ static void pkvm_vcpu_reset_hcr(struct kvm_vcpu *vcpu)
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if (cpus_have_final_cap(ARM64_HAS_STAGE2_FWB))
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vcpu->arch.hcr_el2 |= HCR_FWB;
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if (cpus_have_final_cap(ARM64_HAS_EVT) &&
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!cpus_have_final_cap(ARM64_MISMATCHED_CACHE_TYPE) &&
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kvm_read_vm_id_reg(vcpu->kvm, SYS_CTR_EL0) == read_cpuid(CTR_EL0))
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vcpu->arch.hcr_el2 |= HCR_TID4;
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else
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vcpu->arch.hcr_el2 |= HCR_TID2;
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/*
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* Without AArch32 EL1, leave RW set and let the entry fail with an
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* illegal exception return: the *32_EL2 registers EL2 would otherwise
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* switch are UNDEFINED there.
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*/
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if (vcpu_has_feature(vcpu, KVM_ARM_VCPU_EL1_32BIT) &&
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cpus_have_final_cap(ARM64_HAS_32BIT_EL1))
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vcpu->arch.hcr_el2 &= ~HCR_EL2_RW;
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if (vcpu_has_ptrauth(vcpu))
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vcpu->arch.hcr_el2 |= (HCR_API | HCR_APK);
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if (kvm_has_mte(vcpu->kvm))
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vcpu->arch.hcr_el2 |= HCR_ATA;
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}
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static void pvm_init_traps_hcr(struct kvm_vcpu *vcpu)
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@ -76,6 +76,13 @@ static void pvm_init_traps_hcr(struct kvm_vcpu *vcpu)
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*/
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val |= HCR_TACR | HCR_TIDCP | HCR_TID3 | HCR_TID1;
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if (cpus_have_final_cap(ARM64_HAS_EVT) &&
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!cpus_have_final_cap(ARM64_MISMATCHED_CACHE_TYPE) &&
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kvm_read_vm_id_reg(kvm, SYS_CTR_EL0) == read_cpuid(CTR_EL0))
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val |= HCR_EL2_TID4;
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else
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val |= HCR_EL2_TID2;
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if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP)) {
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val |= HCR_TERR | HCR_TEA;
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val &= ~(HCR_FIEN);
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@ -1468,32 +1468,11 @@ transparent_hugepage_adjust(struct kvm *kvm, struct kvm_memory_slot *memslot,
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return PAGE_SIZE;
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}
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static int get_vma_page_shift(struct vm_area_struct *vma, unsigned long hva)
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static int get_vma_page_shift(struct vm_area_struct *vma)
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{
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unsigned long pa;
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if (is_vm_hugetlb_page(vma) && !(vma->vm_flags & VM_PFNMAP))
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if (is_vm_hugetlb_page(vma))
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return huge_page_shift(hstate_vma(vma));
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if (!(vma->vm_flags & VM_PFNMAP))
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return PAGE_SHIFT;
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VM_BUG_ON(is_vm_hugetlb_page(vma));
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pa = (vma->vm_pgoff << PAGE_SHIFT) + (hva - vma->vm_start);
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#ifndef __PAGETABLE_PMD_FOLDED
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if ((hva & (PUD_SIZE - 1)) == (pa & (PUD_SIZE - 1)) &&
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ALIGN_DOWN(hva, PUD_SIZE) >= vma->vm_start &&
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ALIGN(hva, PUD_SIZE) <= vma->vm_end)
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return PUD_SHIFT;
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#endif
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if ((hva & (PMD_SIZE - 1)) == (pa & (PMD_SIZE - 1)) &&
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ALIGN_DOWN(hva, PMD_SIZE) >= vma->vm_start &&
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ALIGN(hva, PMD_SIZE) <= vma->vm_end)
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return PMD_SHIFT;
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return PAGE_SHIFT;
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}
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@ -1794,7 +1773,7 @@ static short kvm_s2_resolve_vma_size(const struct kvm_s2_fault_desc *s2fd,
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vma_shift = PAGE_SHIFT;
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} else {
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s2vi->max_map_size = PUD_SIZE;
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vma_shift = get_vma_page_shift(vma, s2fd->hva);
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vma_shift = get_vma_page_shift(vma);
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}
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switch (vma_shift) {
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@ -1952,16 +1931,6 @@ static int kvm_s2_fault_pin_pfn(const struct kvm_s2_fault_desc *s2fd,
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return -EFAULT;
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}
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} else {
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/*
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* If the page was identified as device early by looking at
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* the VMA flags, vma_pagesize is already representing the
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* largest quantity we can map. If instead it was mapped
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* via __kvm_faultin_pfn(), vma_pagesize is set to PAGE_SIZE
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* and must not be upgraded.
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*
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* In both cases, we don't let transparent_hugepage_adjust()
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* change things at the last minute.
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*/
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s2vi->map_non_cacheable = true;
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}
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@ -2051,10 +2020,10 @@ static int kvm_s2_fault_map(const struct kvm_s2_fault_desc *s2fd,
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/*
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* If we are not forced to use page mapping, check if we are
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* backed by a THP and thus use block mapping if possible.
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* backed by a huge stage-1 mapping and thus use block mapping if
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* possible.
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*/
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if (mapping_size == PAGE_SIZE &&
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!(s2vi->max_map_size == PAGE_SIZE || s2vi->map_non_cacheable)) {
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if (mapping_size == PAGE_SIZE && s2vi->max_map_size != PAGE_SIZE) {
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if (perm_fault_granule > PAGE_SIZE) {
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mapping_size = perm_fault_granule;
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} else {
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|
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@ -2135,10 +2104,6 @@ static int user_mem_abort(const struct kvm_s2_fault_desc *s2fd)
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return ret;
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}
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/*
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* Let's check if we will get back a huge page backed by hugetlbfs, or
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* get block mapping for device MMIO region.
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*/
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ret = kvm_s2_fault_pin_pfn(s2fd, &s2vi);
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if (ret != 1)
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return ret;
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|
|
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|
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@ -319,12 +319,16 @@ static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
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return ret;
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}
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static int update_affinity(struct vgic_irq *irq, struct kvm_vcpu *vcpu)
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static int update_affinity(struct vgic_irq *irq,
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struct kvm_vcpu *from_vcpu, struct kvm_vcpu *vcpu)
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{
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struct its_vlpi_map map;
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int ret;
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guard(raw_spinlock_irqsave)(&irq->irq_lock);
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if (from_vcpu && irq->target_vcpu != from_vcpu)
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return 0;
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irq->target_vcpu = vcpu;
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if (!irq->hw)
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|
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@ -362,7 +366,7 @@ static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite)
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return;
|
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vcpu = collection_to_vcpu(kvm, ite->collection);
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update_affinity(ite->irq, vcpu);
|
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update_affinity(ite->irq, NULL, vcpu);
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}
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|
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/*
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|
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@ -856,7 +860,7 @@ static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its,
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|||
|
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vgic_its_invalidate_cache(its);
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|
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return update_affinity(ite->irq, vcpu);
|
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return update_affinity(ite->irq, NULL, vcpu);
|
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}
|
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|
||||
static bool __is_visible_gfn_locked(struct vgic_its *its, gpa_t gpa)
|
||||
|
|
@ -1383,7 +1387,7 @@ static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its,
|
|||
if (!irq)
|
||||
continue;
|
||||
|
||||
update_affinity(irq, vcpu2);
|
||||
update_affinity(irq, vcpu1, vcpu2);
|
||||
|
||||
vgic_put_irq(kvm, irq);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -122,6 +122,10 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu)
|
|||
for (int lr = 0; lr < vgic_cpu->vgic_v2.used_lrs; lr++)
|
||||
vgic_v2_fold_lr(vcpu, cpuif->vgic_lr[lr]);
|
||||
|
||||
cpuif->used_lrs = 0;
|
||||
if (!irq)
|
||||
return;
|
||||
|
||||
/* See the GICv3 equivalent for the EOIcount handling rationale */
|
||||
list_for_each_entry_continue(irq, &vgic_cpu->ap_list_head, ap_list) {
|
||||
u32 lr;
|
||||
|
|
@ -144,8 +148,6 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu)
|
|||
vgic_v2_fold_lr(vcpu, lr);
|
||||
eoicount--;
|
||||
}
|
||||
|
||||
cpuif->used_lrs = 0;
|
||||
}
|
||||
|
||||
void vgic_v2_deactivate(struct kvm_vcpu *vcpu, u32 val)
|
||||
|
|
|
|||
|
|
@ -155,6 +155,10 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu)
|
|||
for (int lr = 0; lr < cpuif->used_lrs; lr++)
|
||||
vgic_v3_fold_lr(vcpu, cpuif->vgic_lr[lr]);
|
||||
|
||||
cpuif->used_lrs = 0;
|
||||
if (!irq)
|
||||
return;
|
||||
|
||||
/*
|
||||
* EOIMode=0: use EOIcount to emulate deactivation. We are
|
||||
* guaranteed to deactivate in reverse order of the activation, so
|
||||
|
|
@ -188,8 +192,6 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu)
|
|||
vgic_v3_fold_lr(vcpu, lr);
|
||||
eoicount--;
|
||||
}
|
||||
|
||||
cpuif->used_lrs = 0;
|
||||
}
|
||||
|
||||
void vgic_v3_deactivate(struct kvm_vcpu *vcpu, u64 val)
|
||||
|
|
|
|||
|
|
@ -853,6 +853,17 @@ static void vgic_prune_ap_list(struct kvm_vcpu *vcpu)
|
|||
goto retry;
|
||||
}
|
||||
|
||||
/*
|
||||
* Fix the last_lr_irq refcount which was obtained while
|
||||
* populating the LRs. This can also result in the LPI being
|
||||
* deleted.
|
||||
*/
|
||||
irq = *host_data_ptr(last_lr_irq);
|
||||
if (irq) {
|
||||
deleted_lpis |= vgic_put_irq_norelease(vcpu->kvm, irq);
|
||||
*host_data_ptr(last_lr_irq) = NULL;
|
||||
}
|
||||
|
||||
raw_spin_unlock(&vgic_cpu->ap_list_lock);
|
||||
|
||||
if (unlikely(deleted_lpis))
|
||||
|
|
@ -866,9 +877,6 @@ static void vgic_fold_state(struct kvm_vcpu *vcpu)
|
|||
return;
|
||||
}
|
||||
|
||||
if (!*host_data_ptr(last_lr_irq))
|
||||
return;
|
||||
|
||||
if (kvm_vgic_global_state.type == VGIC_V2)
|
||||
vgic_v2_fold_lr_state(vcpu);
|
||||
else
|
||||
|
|
@ -1021,11 +1029,14 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu)
|
|||
scoped_guard(raw_spinlock, &irq->irq_lock) {
|
||||
if (likely(vgic_target_oracle(irq) == vcpu)) {
|
||||
vgic_populate_lr(vcpu, irq, count++);
|
||||
*host_data_ptr(last_lr_irq) = irq;
|
||||
if (count == kvm_vgic_global_state.nr_lr) {
|
||||
vgic_get_irq_ref(irq);
|
||||
*host_data_ptr(last_lr_irq) = irq;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (count == kvm_vgic_global_state.nr_lr)
|
||||
if (*host_data_ptr(last_lr_irq))
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -196,6 +196,7 @@ TEST_GEN_PROGS_arm64 += arm64/vgic_v5
|
|||
TEST_GEN_PROGS_arm64 += arm64/vpmu_counter_access
|
||||
TEST_GEN_PROGS_arm64 += arm64/no-vgic
|
||||
TEST_GEN_PROGS_arm64 += arm64/idreg-idst
|
||||
TEST_GEN_PROGS_arm64 += arm64/hidden_features
|
||||
TEST_GEN_PROGS_arm64 += arm64/kvm-uuid
|
||||
TEST_GEN_PROGS_arm64 += access_tracking_perf_test
|
||||
TEST_GEN_PROGS_arm64 += arch_timer
|
||||
|
|
|
|||
184
tools/testing/selftests/kvm/arm64/hidden_features.c
Normal file
184
tools/testing/selftests/kvm/arm64/hidden_features.c
Normal file
|
|
@ -0,0 +1,184 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* hidden_features - Check that a feature's instruction runs in the guest when
|
||||
* its ID register field is advertised, and is UNDEFINED when userspace clears
|
||||
* the field.
|
||||
*
|
||||
* Copyright (c) 2026 Google LLC
|
||||
* Author: Fuad Tabba <fuad.tabba@linux.dev>
|
||||
*/
|
||||
#include "kvm_util.h"
|
||||
#include "processor.h"
|
||||
#include "test_util.h"
|
||||
|
||||
static volatile bool undef;
|
||||
|
||||
static void guest_tlbi_os(void)
|
||||
{
|
||||
/* tlbi vmalle1os */
|
||||
asm volatile("sys #0, c8, c1, #0\n\tdsb ish\n\tisb" ::: "memory");
|
||||
}
|
||||
|
||||
static void guest_mops(void)
|
||||
{
|
||||
register u64 *d asm("x0");
|
||||
register u64 n asm("x1");
|
||||
register u64 s asm("x2");
|
||||
u64 buf[8];
|
||||
|
||||
d = buf;
|
||||
n = sizeof(buf);
|
||||
s = 0;
|
||||
/* setp [x0]!, x1!, x2; setm; sete */
|
||||
asm volatile(".inst 0x19c20420\n\t.inst 0x19c24420\n\t.inst 0x19c28420"
|
||||
: "+r"(d), "+r"(n) : "r"(s) : "cc", "memory");
|
||||
}
|
||||
|
||||
static void guest_tcr2(void)
|
||||
{
|
||||
read_sysreg_s(SYS_TCR2_EL1);
|
||||
}
|
||||
|
||||
static void guest_fpmr(void)
|
||||
{
|
||||
read_sysreg_s(SYS_FPMR);
|
||||
}
|
||||
|
||||
struct feature {
|
||||
const char *name;
|
||||
u64 id_reg;
|
||||
u64 mask;
|
||||
u8 shift;
|
||||
u64 min;
|
||||
void (*insn)(void);
|
||||
bool (*trappable)(struct kvm_vcpu *vcpu);
|
||||
};
|
||||
|
||||
/* Without FGT, KVM traps a hidden TLBI OS only through HCR_EL2.TTLBOS (FEAT_EVT2). */
|
||||
static bool tlbi_os_trappable(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
u64 mmfr0 = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64MMFR0_EL1));
|
||||
u64 mmfr2 = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64MMFR2_EL1));
|
||||
|
||||
return SYS_FIELD_GET(ID_AA64MMFR0_EL1, FGT, mmfr0) >= ID_AA64MMFR0_EL1_FGT_IMP ||
|
||||
SYS_FIELD_GET(ID_AA64MMFR2_EL1, EVT, mmfr2) >= ID_AA64MMFR2_EL1_EVT_TTLBxS;
|
||||
}
|
||||
|
||||
#define FEATURE(n, reg, field, min_val, fn, trap) \
|
||||
{ \
|
||||
.name = n, \
|
||||
.id_reg = SYS_##reg, \
|
||||
.mask = reg##_##field##_MASK, \
|
||||
.shift = reg##_##field##_SHIFT, \
|
||||
.min = reg##_##field##_##min_val, \
|
||||
.insn = fn, \
|
||||
.trappable = trap, \
|
||||
}
|
||||
|
||||
static const struct feature features[] = {
|
||||
FEATURE("TLBI OS", ID_AA64ISAR0_EL1, TLB, OS, guest_tlbi_os, tlbi_os_trappable),
|
||||
FEATURE("MOPS", ID_AA64ISAR2_EL1, MOPS, IMP, guest_mops, NULL),
|
||||
FEATURE("TCR2_EL1", ID_AA64MMFR3_EL1, TCRX, IMP, guest_tcr2, NULL),
|
||||
FEATURE("FPMR", ID_AA64PFR2_EL1, FPMR, IMP, guest_fpmr, NULL),
|
||||
};
|
||||
|
||||
static void guest_code(const struct feature *feat)
|
||||
{
|
||||
undef = false;
|
||||
feat->insn();
|
||||
GUEST_SYNC(undef);
|
||||
GUEST_DONE();
|
||||
}
|
||||
|
||||
static void guest_undef_handler(struct ex_regs *regs)
|
||||
{
|
||||
undef = true;
|
||||
regs->pc += 4;
|
||||
}
|
||||
|
||||
static bool run(const struct feature *feat, bool hide)
|
||||
{
|
||||
struct kvm_vcpu *vcpu;
|
||||
struct kvm_vm *vm;
|
||||
struct ucall uc;
|
||||
bool got = false;
|
||||
u64 val;
|
||||
|
||||
vm = vm_create_with_one_vcpu(&vcpu, (void *)guest_code);
|
||||
vm_init_descriptor_tables(vm);
|
||||
vcpu_init_descriptor_tables(vcpu);
|
||||
vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT, ESR_ELx_EC_UNKNOWN, guest_undef_handler);
|
||||
vcpu_args_set(vcpu, 1, feat);
|
||||
|
||||
if (hide) {
|
||||
val = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(feat->id_reg));
|
||||
vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(feat->id_reg), val & ~feat->mask);
|
||||
}
|
||||
|
||||
for (;;) {
|
||||
vcpu_run(vcpu);
|
||||
switch (get_ucall(vcpu, &uc)) {
|
||||
case UCALL_SYNC:
|
||||
got = uc.args[1];
|
||||
break;
|
||||
case UCALL_ABORT:
|
||||
REPORT_GUEST_ASSERT(uc);
|
||||
break;
|
||||
case UCALL_DONE:
|
||||
kvm_vm_free(vm);
|
||||
return got;
|
||||
default:
|
||||
TEST_FAIL("Unknown ucall %lu", uc.cmd);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void probe_feature(const struct feature *feat, bool *present, bool *trappable)
|
||||
{
|
||||
struct kvm_vcpu *vcpu;
|
||||
struct kvm_vm *vm;
|
||||
u64 val;
|
||||
|
||||
vm = vm_create_with_one_vcpu(&vcpu, NULL);
|
||||
val = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(feat->id_reg));
|
||||
*present = ((val & feat->mask) >> feat->shift) >= feat->min;
|
||||
*trappable = !feat->trappable || feat->trappable(vcpu);
|
||||
kvm_vm_free(vm);
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
const struct feature *feat;
|
||||
bool present, trappable;
|
||||
int i;
|
||||
|
||||
test_disable_default_vgic();
|
||||
|
||||
ksft_print_header();
|
||||
ksft_set_plan(ARRAY_SIZE(features) * 2);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(features); i++) {
|
||||
feat = &features[i];
|
||||
|
||||
probe_feature(feat, &present, &trappable);
|
||||
if (!present) {
|
||||
ksft_test_result_skip("%s advertised, not supported\n", feat->name);
|
||||
ksft_test_result_skip("%s hidden, not supported\n", feat->name);
|
||||
continue;
|
||||
}
|
||||
|
||||
if (run(feat, false))
|
||||
ksft_test_result_fail("%s advertised, UNDEF\n", feat->name);
|
||||
else
|
||||
ksft_test_result_pass("%s advertised\n", feat->name);
|
||||
|
||||
if (!trappable)
|
||||
ksft_test_result_skip("%s hidden, not trappable\n", feat->name);
|
||||
else if (run(feat, true))
|
||||
ksft_test_result_pass("%s hidden\n", feat->name);
|
||||
else
|
||||
ksft_test_result_fail("%s hidden, no UNDEF\n", feat->name);
|
||||
}
|
||||
|
||||
ksft_finished();
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user