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ASoC: cs35l45: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs35l45 driver to use the more modern data structure. Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230713-asoc-cirrus-maple-v1-3-a62651831735@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -255,7 +255,7 @@ const struct regmap_config cs35l45_i2c_regmap = {
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.num_reg_defaults = ARRAY_SIZE(cs35l45_defaults),
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.volatile_reg = cs35l45_volatile_reg,
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.readable_reg = cs35l45_readable_reg,
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.cache_type = REGCACHE_RBTREE,
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.cache_type = REGCACHE_MAPLE,
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};
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EXPORT_SYMBOL_NS_GPL(cs35l45_i2c_regmap, SND_SOC_CS35L45);
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@ -271,7 +271,7 @@ const struct regmap_config cs35l45_spi_regmap = {
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.num_reg_defaults = ARRAY_SIZE(cs35l45_defaults),
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.volatile_reg = cs35l45_volatile_reg,
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.readable_reg = cs35l45_readable_reg,
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.cache_type = REGCACHE_RBTREE,
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.cache_type = REGCACHE_MAPLE,
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};
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EXPORT_SYMBOL_NS_GPL(cs35l45_spi_regmap, SND_SOC_CS35L45);
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