diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index 149d9d1ce762..328c2c3ccc24 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c
@@ -680,6 +680,46 @@ static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
 	return rpmh->clks[idx];
 }
 
+DEFINE_CLK_RPMH_ARC(kalama, xo_pad, xo_pad_ao, "xo.lvl", 0x03, 2);
+DEFINE_CLK_RPMH_FIXED(kalama, bi_tcxo, bi_tcxo_ao, xo_pad, xo_pad_ao, 2);
+DEFINE_CLK_RPMH_VRM_OPT(kalama, rf_clk1, rf_clk1_ao, "clka1", 1);
+DEFINE_CLK_RPMH_VRM_OPT(kalama, rf_clk2, rf_clk2_ao, "clka2", 1);
+DEFINE_CLK_RPMH_VRM_OPT(kalama, rf_clk3, rf_clk3_ao, "clka3", 1);
+DEFINE_CLK_RPMH_VRM_OPT(kalama, rf_clk4, rf_clk4_ao, "clka4", 1);
+DEFINE_CLK_RPMH_VRM_OPT(kalama, rf_clk5, rf_clk5_ao, "clka5", 2);
+DEFINE_CLK_RPMH_VRM_OPT(kalama, ln_bb_clk1, ln_bb_clk1_ao, "clka6", 2);
+DEFINE_CLK_RPMH_VRM_OPT(kalama, ln_bb_clk2, ln_bb_clk2_ao, "clka7", 2);
+DEFINE_CLK_RPMH_VRM_OPT(kalama, ln_bb_clk3, ln_bb_clk3_ao, "clka8", 2);
+
+static struct clk_hw *kalama_rpmh_clocks[] = {
+	[RPMH_CXO_PAD_CLK]      = &kalama_xo_pad.hw,
+	[RPMH_CXO_PAD_CLK_A]    = &kalama_xo_pad_ao.hw,
+	[RPMH_CXO_CLK]          = &kalama_bi_tcxo.hw,
+	[RPMH_CXO_CLK_A]        = &kalama_bi_tcxo_ao.hw,
+	[RPMH_LN_BB_CLK1]	= &kalama_ln_bb_clk1.hw,
+	[RPMH_LN_BB_CLK1_A]	= &kalama_ln_bb_clk1_ao.hw,
+	[RPMH_LN_BB_CLK2]	= &kalama_ln_bb_clk2.hw,
+	[RPMH_LN_BB_CLK2_A]	= &kalama_ln_bb_clk2_ao.hw,
+	[RPMH_LN_BB_CLK3]	= &kalama_ln_bb_clk3.hw,
+	[RPMH_LN_BB_CLK3_A]	= &kalama_ln_bb_clk3_ao.hw,
+	[RPMH_RF_CLK1]		= &kalama_rf_clk1.hw,
+	[RPMH_RF_CLK1_A]	= &kalama_rf_clk1_ao.hw,
+	[RPMH_RF_CLK2]		= &kalama_rf_clk2.hw,
+	[RPMH_RF_CLK2_A]	= &kalama_rf_clk2_ao.hw,
+	[RPMH_RF_CLK3]		= &kalama_rf_clk3.hw,
+	[RPMH_RF_CLK3_A]	= &kalama_rf_clk3_ao.hw,
+	[RPMH_RF_CLK4]		= &kalama_rf_clk4.hw,
+	[RPMH_RF_CLK4_A]	= &kalama_rf_clk4_ao.hw,
+	[RPMH_RF_CLK5]		= &kalama_rf_clk5.hw,
+	[RPMH_RF_CLK5_A]	= &kalama_rf_clk5_ao.hw,
+	[RPMH_IPA_CLK]		= &sdm845_ipa.hw,
+};
+
+static const struct clk_rpmh_desc clk_rpmh_kalama = {
+	.clks = kalama_rpmh_clocks,
+	.num_clks = ARRAY_SIZE(kalama_rpmh_clocks),
+};
+
 DEFINE_CLK_RPMH_ARC(pineapple, xo_pad, xo_pad_ao, "xo.lvl", 0x03, 2);
 DEFINE_CLK_RPMH_FIXED(pineapple, bi_tcxo, bi_tcxo_ao, xo_pad, xo_pad_ao, 2);
 DEFINE_CLK_RPMH_VRM_OPT(pineapple, rf_clk1, rf_clk1_ao, "clka1", 1);
@@ -807,6 +847,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
 	{ .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350},
 	{ .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450},
 	{ .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280},
+	{ .compatible = "qcom,kalama-rpmh-clk", .data = &clk_rpmh_kalama},
 	{ .compatible = "qcom,pineapple-rpmh-clk", .data = &clk_rpmh_pineapple},
 	{ }
 };