From f8ea21c7db8b724f64bcee3984e3bb7f0d191a04 Mon Sep 17 00:00:00 2001 From: Sandy Huang Date: Fri, 21 Jan 2022 15:37:00 +0800 Subject: [PATCH] drm/rockchip: dw_hdmi: Fix 8K30/25/24 YUV420 no enter FRL mode Signed-off-by: Sandy Huang Change-Id: I1788a14ba5c4bd0b162b6d78e4b4944450c3c097 --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 994fa64fb45e..d7b8e0718065 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -822,7 +822,7 @@ static void hdmi_select_link_config(struct rockchip_hdmi *hdmi, hdmi->link_cfg.frl_lanes = max_lanes; hdmi->link_cfg.rate_per_lane = max_rate_per_lane; - if (!max_frl_rate || tmdsclk < HDMI20_MAX_RATE) { + if (!max_frl_rate || (tmdsclk < HDMI20_MAX_RATE && mode->clock < HDMI20_MAX_RATE)) { dev_info(hdmi->dev, "use tmds mode\n"); hdmi->link_cfg.frl_mode = false; return;