github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-06-02 19:43:40 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

arm64: dts: rockchip: Add PCIe clkreq stuff for RK3588 EVB1

Browse Source 
Add supports-clkreq and pinmux for PCIe ASPM L1 substates.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Hans Zhang <hans.zhang@cixtech.com>
Link: https://patch.msgid.link/1764809428-183623-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Shawn Lin 2025-12-04 08:50:28 +08:00 committed by Heiko Stuebner
parent 3025d360f0
commit f8a1d7d136
1 changed files with 5 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
View File

@ -522,6 +522,7 @@ &pcie2x1l0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie2_0_rst>, <&pcie2_0_wake>, <&pcie2_0_clkreq>, <&wifi_host_wake_irq>;
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
supports-clkreq;
vpcie3v3-supply = <&vcc3v3_wlan>;
status = "okay";
@ -545,7 +546,8 @@ wifi: wifi@0,0 {
&pcie2x1l1 {
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>;
pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>, <&pcie30x1m1_1_clkreqn>;
supports-clkreq;
status = "okay";
};
@ -555,7 +557,8 @@ &pcie30phy {
&pcie3x4 {
pinctrl-names = "default";
pinctrl-0 = <&pcie3_reset>;
pinctrl-0 = <&pcie3_reset>, <&pcie30x4m1_clkreqn>;
supports-clkreq;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";