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drm/amdgpu/sdma: consolidate engine reset handling
Move the force completion handling into the common engine reset function. No need to duplicate it for every IP version. Reviewed-by: Jesse Zhang <Jesse.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -590,9 +590,12 @@ int amdgpu_sdma_reset_engine(struct amdgpu_device *adev, uint32_t instance_id)
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* to be submitted to the queues after the reset is complete.
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*/
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if (!ret) {
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amdgpu_fence_driver_force_completion(gfx_ring);
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drm_sched_wqueue_start(&gfx_ring->sched);
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if (adev->sdma.has_page_queue)
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if (adev->sdma.has_page_queue) {
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amdgpu_fence_driver_force_completion(page_ring);
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drm_sched_wqueue_start(&page_ring->sched);
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}
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}
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mutex_unlock(&sdma_instance->engine_reset_mutex);
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@ -1714,7 +1714,7 @@ static int sdma_v4_4_2_stop_queue(struct amdgpu_ring *ring)
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static int sdma_v4_4_2_restore_queue(struct amdgpu_ring *ring)
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{
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struct amdgpu_device *adev = ring->adev;
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u32 inst_mask, tmp_mask;
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u32 inst_mask;
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int i, r;
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inst_mask = 1 << ring->me;
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@ -1733,21 +1733,6 @@ static int sdma_v4_4_2_restore_queue(struct amdgpu_ring *ring)
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}
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r = sdma_v4_4_2_inst_start(adev, inst_mask, true);
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if (r)
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return r;
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tmp_mask = inst_mask;
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for_each_inst(i, tmp_mask) {
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ring = &adev->sdma.instance[i].ring;
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amdgpu_fence_driver_force_completion(ring);
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if (adev->sdma.has_page_queue) {
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struct amdgpu_ring *page = &adev->sdma.instance[i].page;
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amdgpu_fence_driver_force_completion(page);
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}
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}
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return r;
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}
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@ -1618,10 +1618,8 @@ static int sdma_v5_0_restore_queue(struct amdgpu_ring *ring)
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r = sdma_v5_0_gfx_resume_instance(adev, inst_id, true);
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amdgpu_gfx_rlc_exit_safe_mode(adev, 0);
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if (r)
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return r;
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amdgpu_fence_driver_force_completion(ring);
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return 0;
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return r;
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}
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static int sdma_v5_0_ring_preempt_ib(struct amdgpu_ring *ring)
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@ -1534,10 +1534,8 @@ static int sdma_v5_2_restore_queue(struct amdgpu_ring *ring)
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r = sdma_v5_2_gfx_resume_instance(adev, inst_id, true);
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amdgpu_gfx_rlc_exit_safe_mode(adev, 0);
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if (r)
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return r;
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amdgpu_fence_driver_force_completion(ring);
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return 0;
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return r;
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}
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static int sdma_v5_2_ring_preempt_ib(struct amdgpu_ring *ring)
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