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arm64: dts: rockchip: px30: add vpu_combo node

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vpu_combo contain vpu & hevc sub node

Change-Id: I6bfd6b4eb0731fdc5dbc6ac63e2c121774309cbb
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
This commit is contained in:
Jung Zhao 2018-01-24 09:32:06 +08:00 committed by Tao Huang
parent ed6a5401ea
commit f83a17343d
1 changed files with 61 additions and 0 deletions
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61
arch/arm64/boot/dts/rockchip/px30.dtsi
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@ -788,6 +788,67 @@ nandc0: nandc@ff3b0000 {
status = "disabled";
};
hevc: hevc_service@ff440000 {
compatible = "rockchip,hevc_sub";
iommu_enabled = <1>;
reg = <0x0 0xff440000 0x0 0x400>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_dec";
dev_mode = <1>;
iommus = <&hevc_mmu>;
name = "hevc_service";
allocator = <1>;
};
vpu: vpu_service@ff442000 {
compatible = "rockchip,vpu_sub";
iommu_enabled = <1>;
reg = <0x0 0xff442000 0x0 0x800>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_enc", "irq_dec";
dev_mode = <0>;
iommus = <&vpu_mmu>;
name = "vpu_service";
allocator = <1>;
};
vpu_combo: vpu_combo {
compatible = "rockchip,vpu_combo";
subcnt = <2>;
rockchip,grf = <&grf>;
rockchip,sub = <&vpu>, <&hevc>;
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>, <&cru SCLK_CORE_VPU>;
clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
resets = <&cru SRST_VPU_A>, <&cru SRST_VPU_H>,
<&cru SRST_IVPU_NIU_A>, <&cru SRST_VPU_NIU_H>;
reset-names = "video_a", "video_h", "niu_a", "niu_h";
mode_bit = <15>;
mode_ctrl = <0x410>;
name = "vpu_combo";
status = "disabled";
};
hevc_mmu: iommu@ff440440 {
compatible = "rockchip,iommu";
reg = <0x0 0xff440440 0x0 0x40>, <0x0 0xff440480 0x0 0x40>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hevc_mmu";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "hclk";
#iommu-cells = <0>;
};
vpu_mmu: iommu@ff442800 {
compatible = "rockchip,iommu";
reg = <0x0 0xff442800 0x0 0x100>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vpu_mmu";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "hclk";
#iommu-cells = <0>;
};
dsi: dsi@ff450000 {
compatible = "rockchip,px30-mipi-dsi";
reg = <0x0 0xff450000 0x0 0x10000>;