From d5c24e20daf09587cbc221d40be1ba92673e8d94 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Thu, 6 May 2021 14:55:11 -0300 Subject: [PATCH 01/19] ARM: dts: rockchip: Fix thermal sensor cells o rk322x The number of cells to be used with a thermal sensor specifier must be "1". Fix this. Signed-off-by: Ezequiel Garcia Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20210506175514.168365-2-ezequiel@collabora.com --- arch/arm/boot/dts/rk322x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 208f21245095..9f02ba7a0cc2 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -517,7 +517,7 @@ tsadc: tsadc@11150000 { pinctrl-0 = <&otp_pin>; pinctrl-1 = <&otp_out>; pinctrl-2 = <&otp_pin>; - #thermal-sensor-cells = <0>; + #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; status = "disabled"; }; From dfbfb86a43f9a5bbd166d88bca9e07ee4e1bff31 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Tue, 26 Jan 2021 12:02:20 +0100 Subject: [PATCH 02/19] ARM: dts: rockchip: fix pinctrl sleep nodename for rk3036-kylin and rk3288 A test with the command below aimed at powerpc generates notifications in the Rockchip ARM tree. Fix pinctrl "sleep" nodename by renaming it to "suspend" for rk3036-kylin and rk3288 make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/powerpc/sleep.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210126110221.10815-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3036-kylin.dts | 2 +- arch/arm/boot/dts/rk3288.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts index 7154b827ea2f..e817eba8c622 100644 --- a/arch/arm/boot/dts/rk3036-kylin.dts +++ b/arch/arm/boot/dts/rk3036-kylin.dts @@ -390,7 +390,7 @@ sdmmc_pwr: sdmmc-pwr { }; }; - sleep { + suspend { global_pwroff: global-pwroff { rockchip,pins = <2 RK_PA7 1 &pcfg_pull_none>; }; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 05557ad02b33..24b903240cb3 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1582,7 +1582,7 @@ pcfg_pull_none_12ma: pcfg-pull-none-12ma { drive-strength = <12>; }; - sleep { + suspend { global_pwroff: global-pwroff { rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>; }; From 7b46d674ac000b101fdad92cf16cc11d90b72f86 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Thu, 6 May 2021 08:11:35 -0300 Subject: [PATCH 03/19] ARM: dts: rockchip: Fix the timer clocks order Fixed order is the device-tree convention. The timer driver currently gets clocks by name, so no changes are needed there. Signed-off-by: Ezequiel Garcia Link: https://lore.kernel.org/r/20210506111136.3941-3-ezequiel@collabora.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188.dtsi | 8 ++++---- arch/arm/boot/dts/rk3288.dtsi | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 2298a8d840ba..2c08ae60e4a1 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -150,16 +150,16 @@ timer3: timer@2000e000 { compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; reg = <0x2000e000 0x20>; interrupts = ; - clocks = <&cru SCLK_TIMER3>, <&cru PCLK_TIMER3>; - clock-names = "timer", "pclk"; + clocks = <&cru PCLK_TIMER3>, <&cru SCLK_TIMER3>; + clock-names = "pclk", "timer"; }; timer6: timer@200380a0 { compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; reg = <0x200380a0 0x20>; interrupts = ; - clocks = <&cru SCLK_TIMER6>, <&cru PCLK_TIMER0>; - clock-names = "timer", "pclk"; + clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER6>; + clock-names = "pclk", "timer"; }; i2s0: i2s@1011a000 { diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 24b903240cb3..1e6594f8a293 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -196,8 +196,8 @@ timer: timer@ff810000 { compatible = "rockchip,rk3288-timer"; reg = <0x0 0xff810000 0x0 0x20>; interrupts = ; - clocks = <&xin24m>, <&cru PCLK_TIMER>; - clock-names = "timer", "pclk"; + clocks = <&cru PCLK_TIMER>, <&xin24m>; + clock-names = "pclk", "timer"; }; display-subsystem { From 6b023929666f0be5df75f5e0278d1b70effadf42 Mon Sep 17 00:00:00 2001 From: Benjamin Gaignard Date: Fri, 7 May 2021 11:02:29 +0200 Subject: [PATCH 04/19] ARM: dts: rockchip: Fix IOMMU nodes properties on rk322x Add '#" to iommu-cells properties. Remove useless interrupt-names properties Signed-off-by: Benjamin Gaignard Link: https://lore.kernel.org/r/20210507090232.233049-4-benjamin.gaignard@collabora.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk322x.dtsi | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 9f02ba7a0cc2..25f83f2f5618 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -558,10 +558,9 @@ vpu_mmu: iommu@20020800 { compatible = "rockchip,iommu"; reg = <0x20020800 0x100>; interrupts = ; - interrupt-names = "vpu_mmu"; clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; clock-names = "aclk", "iface"; - iommu-cells = <0>; + #iommu-cells = <0>; status = "disabled"; }; @@ -569,10 +568,9 @@ vdec_mmu: iommu@20030480 { compatible = "rockchip,iommu"; reg = <0x20030480 0x40>, <0x200304c0 0x40>; interrupts = ; - interrupt-names = "vdec_mmu"; clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; clock-names = "aclk", "iface"; - iommu-cells = <0>; + #iommu-cells = <0>; status = "disabled"; }; @@ -602,7 +600,6 @@ vop_mmu: iommu@20053f00 { compatible = "rockchip,iommu"; reg = <0x20053f00 0x100>; interrupts = ; - interrupt-names = "vop_mmu"; clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; clock-names = "aclk", "iface"; #iommu-cells = <0>; @@ -623,10 +620,9 @@ iep_mmu: iommu@20070800 { compatible = "rockchip,iommu"; reg = <0x20070800 0x100>; interrupts = ; - interrupt-names = "iep_mmu"; clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; clock-names = "aclk", "iface"; - iommu-cells = <0>; + #iommu-cells = <0>; status = "disabled"; }; From 304b8fbc950bae102f29ee1e8e8557f2fd08d69a Mon Sep 17 00:00:00 2001 From: Benjamin Gaignard Date: Fri, 7 May 2021 11:02:30 +0200 Subject: [PATCH 05/19] ARM: dts: rockchip: Remove useless interrupt-names on IOMMU node on rk3036 Remove useless interrupt-names property for IOMMU node Signed-off-by: Benjamin Gaignard Link: https://lore.kernel.org/r/20210507090232.233049-5-benjamin.gaignard@collabora.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3036.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index e24230d50a78..9ccefa8282ba 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -140,7 +140,6 @@ vop_mmu: iommu@10118300 { compatible = "rockchip,iommu"; reg = <0x10118300 0x100>; interrupts = ; - interrupt-names = "vop_mmu"; clocks = <&cru ACLK_LCDC>, <&cru HCLK_LCDC>; clock-names = "aclk", "iface"; #iommu-cells = <0>; From f2948781a72f0d8cf2adf31758c357f2f35e6c79 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Sat, 17 Apr 2021 13:29:38 +0200 Subject: [PATCH 06/19] ARM: dts: rockchip: Fix power-controller node names for rk3066a Use more generic names (as recommended in the device tree specification or the binding documentation) Signed-off-by: Elaine Zhang Reviewed-by: Enric Balletbo i Serra Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210417112952.8516-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 252750c97f97..bbc3bff50856 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -755,7 +755,7 @@ power: power-controller { #address-cells = <1>; #size-cells = <0>; - pd_vio@RK3066_PD_VIO { + power-domain@RK3066_PD_VIO { reg = ; clocks = <&cru ACLK_LCDC0>, <&cru ACLK_LCDC1>, @@ -782,7 +782,7 @@ pd_vio@RK3066_PD_VIO { <&qos_rga>; }; - pd_video@RK3066_PD_VIDEO { + power-domain@RK3066_PD_VIDEO { reg = ; clocks = <&cru ACLK_VDPU>, <&cru ACLK_VEPU>, @@ -791,7 +791,7 @@ pd_video@RK3066_PD_VIDEO { pm_qos = <&qos_vpu>; }; - pd_gpu@RK3066_PD_GPU { + power-domain@RK3066_PD_GPU { reg = ; clocks = <&cru ACLK_GPU>; pm_qos = <&qos_gpu>; From d3bcbcd396175ac26aa54919c0b31c7d2878fc24 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Sat, 17 Apr 2021 13:29:39 +0200 Subject: [PATCH 07/19] ARM: dts: rockchip: Fix power-controller node names for rk3188 Use more generic names (as recommended in the device tree specification or the binding documentation) Signed-off-by: Elaine Zhang Reviewed-by: Enric Balletbo i Serra Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210417112952.8516-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 2c08ae60e4a1..b6bde9d12c2b 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -699,7 +699,7 @@ power: power-controller { #address-cells = <1>; #size-cells = <0>; - pd_vio@RK3188_PD_VIO { + power-domain@RK3188_PD_VIO { reg = ; clocks = <&cru ACLK_LCDC0>, <&cru ACLK_LCDC1>, @@ -721,7 +721,7 @@ pd_vio@RK3188_PD_VIO { <&qos_rga>; }; - pd_video@RK3188_PD_VIDEO { + power-domain@RK3188_PD_VIDEO { reg = ; clocks = <&cru ACLK_VDPU>, <&cru ACLK_VEPU>, @@ -730,7 +730,7 @@ pd_video@RK3188_PD_VIDEO { pm_qos = <&qos_vpu>; }; - pd_gpu@RK3188_PD_GPU { + power-domain@RK3188_PD_GPU { reg = ; clocks = <&cru ACLK_GPU>; pm_qos = <&qos_gpu>; From 970cdc53cb1afa73602028c103dbfb6a230080be Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Sat, 17 Apr 2021 13:29:40 +0200 Subject: [PATCH 08/19] ARM: dts: rockchip: Fix power-controller node names for rk3288 Use more generic names (as recommended in the device tree specification or the binding documentation) Signed-off-by: Elaine Zhang Reviewed-by: Enric Balletbo i Serra Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210417112952.8516-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 1e6594f8a293..d6dbfbd99568 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -765,7 +765,7 @@ power: power-controller { * *_HDMI HDMI * *_MIPI_* MIPI */ - pd_vio@RK3288_PD_VIO { + power-domain@RK3288_PD_VIO { reg = ; clocks = <&cru ACLK_IEP>, <&cru ACLK_ISP>, @@ -807,7 +807,7 @@ pd_vio@RK3288_PD_VIO { * Note: The following 3 are HEVC(H.265) clocks, * and on the ACLK_HEVC_NIU (NOC). */ - pd_hevc@RK3288_PD_HEVC { + power-domain@RK3288_PD_HEVC { reg = ; clocks = <&cru ACLK_HEVC>, <&cru SCLK_HEVC_CABAC>, @@ -821,7 +821,7 @@ pd_hevc@RK3288_PD_HEVC { * (video endecoder & decoder) clocks that on the * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC). */ - pd_video@RK3288_PD_VIDEO { + power-domain@RK3288_PD_VIDEO { reg = ; clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; @@ -832,7 +832,7 @@ pd_video@RK3288_PD_VIDEO { * Note: ACLK_GPU is the GPU clock, * and on the ACLK_GPU_NIU (NOC). */ - pd_gpu@RK3288_PD_GPU { + power-domain@RK3288_PD_GPU { reg = ; clocks = <&cru ACLK_GPU>; pm_qos = <&qos_gpu_r>, From a3ec2d38f6dd922007ee4d414cf76d1f55570844 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 17 Apr 2021 13:29:41 +0200 Subject: [PATCH 09/19] ARM: dts: rockchip: add #power-domain-cells to power domain nodes Add #power-domain-cells to power domain nodes, because they are required by power-domain.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210417112952.8516-5-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a.dtsi | 3 +++ arch/arm/boot/dts/rk3188.dtsi | 3 +++ arch/arm/boot/dts/rk3288.dtsi | 4 ++++ 3 files changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index bbc3bff50856..8e087c34b881 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -780,6 +780,7 @@ power-domain@RK3066_PD_VIO { <&qos_cif1>, <&qos_ipp>, <&qos_rga>; + #power-domain-cells = <0>; }; power-domain@RK3066_PD_VIDEO { @@ -789,12 +790,14 @@ power-domain@RK3066_PD_VIDEO { <&cru HCLK_VDPU>, <&cru HCLK_VEPU>; pm_qos = <&qos_vpu>; + #power-domain-cells = <0>; }; power-domain@RK3066_PD_GPU { reg = ; clocks = <&cru ACLK_GPU>; pm_qos = <&qos_gpu>; + #power-domain-cells = <0>; }; }; }; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index b6bde9d12c2b..f1632b820717 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -719,6 +719,7 @@ power-domain@RK3188_PD_VIO { <&qos_cif0>, <&qos_ipp>, <&qos_rga>; + #power-domain-cells = <0>; }; power-domain@RK3188_PD_VIDEO { @@ -728,12 +729,14 @@ power-domain@RK3188_PD_VIDEO { <&cru HCLK_VDPU>, <&cru HCLK_VEPU>; pm_qos = <&qos_vpu>; + #power-domain-cells = <0>; }; power-domain@RK3188_PD_GPU { reg = ; clocks = <&cru ACLK_GPU>; pm_qos = <&qos_gpu>; + #power-domain-cells = <0>; }; }; }; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index d6dbfbd99568..9c5a7791a1ab 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -801,6 +801,7 @@ power-domain@RK3288_PD_VIO { <&qos_vio2_rga_r>, <&qos_vio2_rga_w>, <&qos_vio1_isp_r>; + #power-domain-cells = <0>; }; /* @@ -814,6 +815,7 @@ power-domain@RK3288_PD_HEVC { <&cru SCLK_HEVC_CORE>; pm_qos = <&qos_hevc_r>, <&qos_hevc_w>; + #power-domain-cells = <0>; }; /* @@ -826,6 +828,7 @@ power-domain@RK3288_PD_VIDEO { clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; pm_qos = <&qos_video>; + #power-domain-cells = <0>; }; /* @@ -837,6 +840,7 @@ power-domain@RK3288_PD_GPU { clocks = <&cru ACLK_GPU>; pm_qos = <&qos_gpu_r>, <&qos_gpu_w>; + #power-domain-cells = <0>; }; }; From dc71c5ca34f408030b979d894c0459ef059445a1 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Mon, 10 May 2021 19:29:11 +0200 Subject: [PATCH 10/19] ARM: dts: rockchip: Remove more clock-names from PWM nodes A test with the command below gives this error: /arch/arm/boot/dts/rk3228-evb.dt.yaml: pwm@110b0020: clock-names: ['pwm'] is too short Devices with only one PWM clock use it to both to derive the functional clock for the device and as the bus clock. The driver does not need "clock-names" to get a handle, so remove them all. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210510172911.6763-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk322x.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 25f83f2f5618..5774bc309eb7 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -379,7 +379,6 @@ pwm0: pwm@110b0000 { reg = <0x110b0000 0x10>; #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; status = "disabled"; @@ -390,7 +389,6 @@ pwm1: pwm@110b0010 { reg = <0x110b0010 0x10>; #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; status = "disabled"; @@ -401,7 +399,6 @@ pwm2: pwm@110b0020 { reg = <0x110b0020 0x10>; #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm2_pin>; status = "disabled"; @@ -412,7 +409,6 @@ pwm3: pwm@110b0030 { reg = <0x110b0030 0x10>; #pwm-cells = <2>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm3_pin>; status = "disabled"; From 87cf20ccecb3e3c00605980ef0dba61398499bf6 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Mon, 10 May 2021 21:20:54 +0200 Subject: [PATCH 11/19] ARM: dts: rockchip: rename vcc_stdby node name for rk3066a-rayeager.dts A test with the command below gives this error: /arch/arm/boot/dts/rk3066a-rayeager.dt.yaml: /: '5v-stdby-regulator' does not match any of the regexes: '.*-names$', '.*-supply$', '^#.*-cells$', '^#[a-zA-Z0-9,+\\-._]{0,63}$', '^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}$', '^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+(,[0-9a-fA-F]+)*$', '^__.*__$', 'pinctrl-[0-9]+' A node name shouldn't start with a number, so change it to 'stdby-regulator'. make ARCH=arm dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema /schemas/dt-core.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210510192054.8876-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a-rayeager.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3066a-rayeager.dts b/arch/arm/boot/dts/rk3066a-rayeager.dts index 309518403d86..a73e8900c924 100644 --- a/arch/arm/boot/dts/rk3066a-rayeager.dts +++ b/arch/arm/boot/dts/rk3066a-rayeager.dts @@ -58,7 +58,7 @@ vsys: vsys-regulator { }; /* input for 5V_STDBY is VSYS or DC5V, selectable by jumper J4 */ - vcc_stdby: 5v-stdby-regulator { + vcc_stdby: stdby-regulator { compatible = "regulator-fixed"; regulator-name = "5v_stdby"; regulator-min-microvolt = <5000000>; From 6e4e4e2a255849758b8d3240671060d355d71edf Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Wed, 12 May 2021 14:23:45 +0200 Subject: [PATCH 12/19] ARM: dts: rockchip: move and restyle grf nodes rk3066/rk3188 With grf.txt converted to YAML a lot of compatibles did not have 'simple-mfd' added in the old binding. That implies that if you have child nodes they need to be documented. Make the new layout fit for rk3066/rk3188, move and restyle the grf nodes. Remove rockchip,grf from usbphy node. Add "#phy-cells", because it is a required property by phy-provider.yaml With the conversion of syscon.yaml minItems for compatibles was set to 2. Current Rockchip rk3xxx.dtsi file only uses "syscon" for the grf registers. Add "syscon", "simple-mfd" compatible for rk3066/rk3188 to reduce notifications produced with: make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml Changed compatibles: "rockchip,rk3066-grf", "syscon", "simple-mfd" "rockchip,rk3188-grf", "syscon", "simple-mfd" Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210512122346.9463-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a.dtsi | 53 +++++++++++++++++++--------------- arch/arm/boot/dts/rk3188.dtsi | 53 +++++++++++++++++++--------------- arch/arm/boot/dts/rk3xxx.dtsi | 2 +- 3 files changed, 59 insertions(+), 49 deletions(-) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 8e087c34b881..30dcf557ec33 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -266,30 +266,6 @@ tsadc: tsadc@20060000 { status = "disabled"; }; - usbphy: phy { - compatible = "rockchip,rk3066a-usb-phy", "rockchip,rk3288-usb-phy"; - rockchip,grf = <&grf>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - usbphy0: usb-phy@17c { - #phy-cells = <0>; - reg = <0x17c>; - clocks = <&cru SCLK_OTGPHY0>; - clock-names = "phyclk"; - #clock-cells = <0>; - }; - - usbphy1: usb-phy@188 { - #phy-cells = <0>; - reg = <0x188>; - clocks = <&cru SCLK_OTGPHY1>; - clock-names = "phyclk"; - #clock-cells = <0>; - }; - }; - pinctrl: pinctrl { compatible = "rockchip,rk3066a-pinctrl"; rockchip,grf = <&grf>; @@ -702,6 +678,35 @@ &gpu { power-domains = <&power RK3066_PD_GPU>; }; +&grf { + compatible = "rockchip,rk3066-grf", "syscon", "simple-mfd"; + + usbphy: usbphy { + compatible = "rockchip,rk3066a-usb-phy", + "rockchip,rk3288-usb-phy"; + #phy-cells = <0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + usbphy0: usb-phy@17c { + reg = <0x17c>; + clocks = <&cru SCLK_OTGPHY0>; + clock-names = "phyclk"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + + usbphy1: usb-phy@188 { + reg = <0x188>; + clocks = <&cru SCLK_OTGPHY1>; + clock-names = "phyclk"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + }; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_xfer>; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index f1632b820717..3a0c50026b07 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -214,30 +214,6 @@ cpu_leakage: cpu_leakage@17 { }; }; - usbphy: phy { - compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy"; - rockchip,grf = <&grf>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - usbphy0: usb-phy@10c { - #phy-cells = <0>; - reg = <0x10c>; - clocks = <&cru SCLK_OTGPHY0>; - clock-names = "phyclk"; - #clock-cells = <0>; - }; - - usbphy1: usb-phy@11c { - #phy-cells = <0>; - reg = <0x11c>; - clocks = <&cru SCLK_OTGPHY1>; - clock-names = "phyclk"; - #clock-cells = <0>; - }; - }; - pinctrl: pinctrl { compatible = "rockchip,rk3188-pinctrl"; rockchip,grf = <&grf>; @@ -662,6 +638,35 @@ &gpu { power-domains = <&power RK3188_PD_GPU>; }; +&grf{ + compatible = "rockchip,rk3188-grf", "syscon", "simple-mfd"; + + usbphy: usbphy { + compatible = "rockchip,rk3188-usb-phy", + "rockchip,rk3288-usb-phy"; + #phy-cells = <0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + usbphy0: usb-phy@10c { + reg = <0x10c>; + clocks = <&cru SCLK_OTGPHY0>; + clock-names = "phyclk"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + + usbphy1: usb-phy@11c { + reg = <0x11c>; + clocks = <&cru SCLK_OTGPHY1>; + clock-names = "phyclk"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + }; +}; + &i2c0 { compatible = "rockchip,rk3188-i2c"; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 755c946f11de..d473552e8547 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -256,7 +256,7 @@ reboot-mode { }; grf: grf@20008000 { - compatible = "syscon"; + compatible = "syscon", "simple-mfd"; reg = <0x20008000 0x200>; }; From d67113c261c196232c96dbed1ff2fbd071c8c457 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Thu, 20 May 2021 11:18:22 +0200 Subject: [PATCH 13/19] ARM: dts: rockchip: move mmc aliases to board dts on rk3066/rk3188 As suggested by Arnd Bergmann, the newly added mmc aliases should be board specific, so move them from the general dtsi to the individual boards. Suggested-by: Arnd Bergmann Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210520091822.28491-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a-bqcurie2.dts | 5 +++++ arch/arm/boot/dts/rk3066a-marsboard.dts | 4 ++++ arch/arm/boot/dts/rk3066a-mk808.dts | 5 +++++ arch/arm/boot/dts/rk3066a-rayeager.dts | 6 ++++++ arch/arm/boot/dts/rk3188-bqedison2qc.dts | 6 ++++++ arch/arm/boot/dts/rk3188-px3-evb.dts | 5 +++++ arch/arm/boot/dts/rk3188-radxarock.dts | 4 ++++ arch/arm/boot/dts/rk3xxx.dtsi | 3 --- 8 files changed, 35 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts index eba7a1344976..390aa33cd55a 100644 --- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts +++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts @@ -12,6 +12,11 @@ / { model = "bq Curie 2"; compatible = "mundoreader,bq-curie2", "rockchip,rk3066a"; + aliases { + mmc0 = &mmc0; + mmc1 = &mmc1; + }; + memory@60000000 { device_type = "memory"; reg = <0x60000000 0x40000000>; diff --git a/arch/arm/boot/dts/rk3066a-marsboard.dts b/arch/arm/boot/dts/rk3066a-marsboard.dts index 6b121658d93c..a66d915aa0f6 100644 --- a/arch/arm/boot/dts/rk3066a-marsboard.dts +++ b/arch/arm/boot/dts/rk3066a-marsboard.dts @@ -10,6 +10,10 @@ / { model = "MarsBoard RK3066"; compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a"; + aliases { + mmc0 = &mmc0; + }; + memory@60000000 { device_type = "memory"; reg = <0x60000000 0x40000000>; diff --git a/arch/arm/boot/dts/rk3066a-mk808.dts b/arch/arm/boot/dts/rk3066a-mk808.dts index eed9e60cffa2..9790bc63b50a 100644 --- a/arch/arm/boot/dts/rk3066a-mk808.dts +++ b/arch/arm/boot/dts/rk3066a-mk808.dts @@ -10,6 +10,11 @@ / { model = "Rikomagic MK808"; compatible = "rikomagic,mk808", "rockchip,rk3066a"; + aliases { + mmc0 = &mmc0; + mmc1 = &mmc1; + }; + chosen { stdout-path = "serial2:115200n8"; }; diff --git a/arch/arm/boot/dts/rk3066a-rayeager.dts b/arch/arm/boot/dts/rk3066a-rayeager.dts index a73e8900c924..12b2e59aebc4 100644 --- a/arch/arm/boot/dts/rk3066a-rayeager.dts +++ b/arch/arm/boot/dts/rk3066a-rayeager.dts @@ -11,6 +11,12 @@ / { model = "Rayeager PX2"; compatible = "chipspark,rayeager-px2", "rockchip,rk3066a"; + aliases { + mmc0 = &mmc0; + mmc1 = &mmc1; + mmc2 = &emmc; + }; + memory@60000000 { device_type = "memory"; reg = <0x60000000 0x40000000>; diff --git a/arch/arm/boot/dts/rk3188-bqedison2qc.dts b/arch/arm/boot/dts/rk3188-bqedison2qc.dts index 66a0ff196eb1..85d3fce0142f 100644 --- a/arch/arm/boot/dts/rk3188-bqedison2qc.dts +++ b/arch/arm/boot/dts/rk3188-bqedison2qc.dts @@ -13,6 +13,12 @@ / { model = "BQ Edison2 Quad-Core"; compatible = "mundoreader,bq-edison2qc", "rockchip,rk3188"; + aliases { + mmc0 = &mmc0; + mmc1 = &mmc1; + mmc2 = &emmc; + }; + memory@60000000 { device_type = "memory"; reg = <0x60000000 0x80000000>; diff --git a/arch/arm/boot/dts/rk3188-px3-evb.dts b/arch/arm/boot/dts/rk3188-px3-evb.dts index c32e1d441cf7..39c60426c9c9 100644 --- a/arch/arm/boot/dts/rk3188-px3-evb.dts +++ b/arch/arm/boot/dts/rk3188-px3-evb.dts @@ -11,6 +11,11 @@ / { model = "Rockchip PX3-EVB"; compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188"; + aliases { + mmc0 = &mmc0; + mmc1 = &emmc; + }; + chosen { stdout-path = "serial2:115200n8"; }; diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts index b0fef82c0a71..36c0945f43b2 100644 --- a/arch/arm/boot/dts/rk3188-radxarock.dts +++ b/arch/arm/boot/dts/rk3188-radxarock.dts @@ -11,6 +11,10 @@ / { model = "Radxa Rock"; compatible = "radxa,rock", "rockchip,rk3188"; + aliases { + mmc0 = &mmc0; + }; + memory@60000000 { device_type = "memory"; reg = <0x60000000 0x80000000>; diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index d473552e8547..f9bbc2424444 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -21,9 +21,6 @@ aliases { i2c2 = &i2c2; i2c3 = &i2c3; i2c4 = &i2c4; - mshc0 = &emmc; - mshc1 = &mmc0; - mshc2 = &mmc1; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; From 2fd2300a9c17ee1c48b1b7a7fabbb90fd12a64f1 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Tue, 1 Jun 2021 18:47:58 +0200 Subject: [PATCH 14/19] ARM: dts: rockchip: rename nodename for phy-rockchip-inno-usb2 The pattern: "^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$" in phy-provider.yaml has required "#phy-cells" for phy nodes. The "phy-cells" in rockchip-inno-usb2 nodes are located in subnodes. Rename the nodename to pattern "usb2phy@[0-9a-f]+$" to prevent notifications. make ARCH=arm dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ phy/phy-provider.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210601164800.7670-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk322x.dtsi | 4 ++-- arch/arm/boot/dts/rv1108.dtsi | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 5774bc309eb7..cffd7acfb94f 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -190,7 +190,7 @@ io_domains: io-domains { status = "disabled"; }; - u2phy0: usb2-phy@760 { + u2phy0: usb2phy@760 { compatible = "rockchip,rk3228-usb2phy"; reg = <0x0760 0x0c>; clocks = <&cru SCLK_OTGPHY0>; @@ -217,7 +217,7 @@ u2phy0_host: host-port { }; }; - u2phy1: usb2-phy@800 { + u2phy1: usb2phy@800 { compatible = "rockchip,rk3228-usb2phy"; reg = <0x0800 0x0c>; clocks = <&cru SCLK_OTGPHY1>; diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 884872ca5207..9bd0acf3b708 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -265,7 +265,7 @@ grf: syscon@10300000 { #address-cells = <1>; #size-cells = <1>; - u2phy: usb2-phy@100 { + u2phy: usb2phy@100 { compatible = "rockchip,rv1108-usb2phy"; reg = <0x100 0x0c>; clocks = <&cru SCLK_USBPHY>; From 60fba46d6e7a6e5de4be2ea158aa6134ec7a161e Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Thu, 3 Jun 2021 14:10:10 +0200 Subject: [PATCH 15/19] ARM: dts: rockchip: remove #phy-cells from usbphy node rk3066/rk3188 The review process of rockchip-usb-phy.yaml was not finished when the patch in the link below was already applied. Remove the unneeded #phy-cells property. https://lore.kernel.org/r/20210512122346.9463-4-jbx6244@gmail.com Fixes: 6e4e4e2a2558 ("ARM: dts: rockchip: move and restyle grf nodes rk3066/rk3188") Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210603121010.4315-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a.dtsi | 1 - arch/arm/boot/dts/rk3188.dtsi | 1 - 2 files changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 30dcf557ec33..511311d257bd 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -684,7 +684,6 @@ &grf { usbphy: usbphy { compatible = "rockchip,rk3066a-usb-phy", "rockchip,rk3288-usb-phy"; - #phy-cells = <0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 3a0c50026b07..b36fcdd9a516 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -644,7 +644,6 @@ &grf{ usbphy: usbphy { compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy"; - #phy-cells = <0>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; From f07edc41220b14ce057a4e6d7161b30688ddb8a2 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sun, 6 Jun 2021 20:16:32 +0200 Subject: [PATCH 16/19] ARM: dts: rockchip: fix supply properties in io-domains nodes A test with rockchip-io-domain.yaml gives notifications for supply properties in io-domains nodes. Fix them all into ".*-supply$" format. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210606181632.13371-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-rock2-som.dtsi | 2 +- arch/arm/boot/dts/rk3288-vyasa.dts | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi index 44bb5e6f83b1..76363b8afcb9 100644 --- a/arch/arm/boot/dts/rk3288-rock2-som.dtsi +++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi @@ -218,7 +218,7 @@ &io_domains { flash0-supply = <&vcc_flash>; flash1-supply = <&vccio_pmu>; gpio30-supply = <&vccio_pmu>; - gpio1830 = <&vcc_io>; + gpio1830-supply = <&vcc_io>; lcdc-supply = <&vcc_io>; sdcard-supply = <&vccio_sd>; wifi-supply = <&vcc_18>; diff --git a/arch/arm/boot/dts/rk3288-vyasa.dts b/arch/arm/boot/dts/rk3288-vyasa.dts index aa50f8ed4ca0..b156a83eb7d7 100644 --- a/arch/arm/boot/dts/rk3288-vyasa.dts +++ b/arch/arm/boot/dts/rk3288-vyasa.dts @@ -379,10 +379,10 @@ &io_domains { audio-supply = <&vcc_18>; bb-supply = <&vcc_io>; dvp-supply = <&vcc_io>; - flash0-suuply = <&vcc_18>; + flash0-supply = <&vcc_18>; flash1-supply = <&vcc_lan>; gpio30-supply = <&vcc_io>; - gpio1830 = <&vcc_io>; + gpio1830-supply = <&vcc_io>; lcdc-supply = <&vcc_io>; sdcard-supply = <&vccio_sd>; wifi-supply = <&vcc_18>; From 3fedcc636e28f6188b6bb126199eda031bc707f3 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 12 Jun 2021 20:47:33 +0200 Subject: [PATCH 17/19] ARM: dts: rockchip: add labels to the timer nodes on rk3066a While the kernel doesn't care so much right now, boot loaders like u-boot need to refine the node on their side, so to make life easier for everyone add the labels to the timer nodes on rk3066a. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210612184733.2331-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 511311d257bd..b15cbbe23ffc 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -217,7 +217,7 @@ cru: clock-controller@20000000 { <150000000>, <75000000>; }; - timer@2000e000 { + timer2: timer@2000e000 { compatible = "snps,dw-apb-timer-osc"; reg = <0x2000e000 0x100>; interrupts = ; @@ -238,7 +238,7 @@ cpu_leakage: cpu_leakage@17 { }; }; - timer@20038000 { + timer0: timer@20038000 { compatible = "snps,dw-apb-timer-osc"; reg = <0x20038000 0x100>; interrupts = ; @@ -246,7 +246,7 @@ timer@20038000 { clock-names = "timer", "pclk"; }; - timer@2003a000 { + timer1: timer@2003a000 { compatible = "snps,dw-apb-timer-osc"; reg = <0x2003a000 0x100>; interrupts = ; From 1a4eb37f3174d3a54e40392abcfbb9b3949948bb Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Thu, 27 May 2021 17:44:51 +0200 Subject: [PATCH 18/19] ARM: dts: rockchip: add power controller for RK3036 Add the power controller node and the correspondending qos nodes for RK3036. Also add the power-domain property to the nodes that are already present. Note: Since the regiser offsets of the axi interconnect QoS are missing in the TRM (RK3036 TRM V1.0), they have been taken from vendor kernel. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20210527154455.358869-9-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3036.dtsi | 50 +++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 9ccefa8282ba..33019d2a2233 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include / { #address-cells = <1>; @@ -111,6 +112,7 @@ gpu: gpu@10090000 { assigned-clock-rates = <100000000>; clocks = <&cru SCLK_GPU>, <&cru SCLK_GPU>; clock-names = "bus", "core"; + power-domains = <&power RK3036_PD_GPU>; resets = <&cru SRST_GPU>; status = "disabled"; }; @@ -124,6 +126,7 @@ vop: vop@10118000 { resets = <&cru SRST_LCDC1_A>, <&cru SRST_LCDC1_H>, <&cru SRST_LCDC1_D>; reset-names = "axi", "ahb", "dclk"; iommus = <&vop_mmu>; + power-domains = <&power RK3036_PD_VIO>; status = "disabled"; vop_out: port { @@ -142,10 +145,26 @@ vop_mmu: iommu@10118300 { interrupts = ; clocks = <&cru ACLK_LCDC>, <&cru HCLK_LCDC>; clock-names = "aclk", "iface"; + power-domains = <&power RK3036_PD_VIO>; #iommu-cells = <0>; status = "disabled"; }; + qos_gpu: qos@1012d000 { + compatible = "rockchip,rk3036-qos", "syscon"; + reg = <0x1012d000 0x20>; + }; + + qos_vpu: qos@1012e000 { + compatible = "rockchip,rk3036-qos", "syscon"; + reg = <0x1012e000 0x20>; + }; + + qos_vio: qos@1012f000 { + compatible = "rockchip,rk3036-qos", "syscon"; + reg = <0x1012f000 0x20>; + }; + gic: interrupt-controller@10139000 { compatible = "arm,gic-400"; interrupt-controller; @@ -301,6 +320,37 @@ grf: syscon@20008000 { compatible = "rockchip,rk3036-grf", "syscon", "simple-mfd"; reg = <0x20008000 0x1000>; + power: power-controller { + compatible = "rockchip,rk3036-power-controller"; + #power-domain-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + power-domain@RK3036_PD_VIO { + reg = ; + clocks = <&cru ACLK_LCDC>, + <&cru HCLK_LCDC>, + <&cru SCLK_LCDC>; + pm_qos = <&qos_vio>; + #power-domain-cells = <0>; + }; + + power-domain@RK3036_PD_VPU { + reg = ; + clocks = <&cru ACLK_VCODEC>, + <&cru HCLK_VCODEC>; + pm_qos = <&qos_vpu>; + #power-domain-cells = <0>; + }; + + power-domain@RK3036_PD_GPU { + reg = ; + clocks = <&cru SCLK_GPU>; + pm_qos = <&qos_gpu>; + #power-domain-cells = <0>; + }; + }; + reboot-mode { compatible = "syscon-reboot-mode"; offset = <0x1d8>; From 623ba75a5d6b8e196a21f3ed36d26a5f6db459ce Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Thu, 27 May 2021 17:44:52 +0200 Subject: [PATCH 19/19] ARM: dts: rockchip: add power controller for RK322x Add the power controller node and the correspondending qos nodes for RK322x. Also add the power-domain property to the nodes that are already present. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20210527154455.358869-10-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk322x.dtsi | 111 ++++++++++++++++++++++++++++++++++ 1 file changed, 111 insertions(+) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index cffd7acfb94f..ea8ceeb09c0b 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include / { #address-cells = <1>; @@ -190,6 +191,64 @@ io_domains: io-domains { status = "disabled"; }; + power: power-controller { + compatible = "rockchip,rk3228-power-controller"; + #power-domain-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + power-domain@RK3228_PD_VIO { + reg = ; + clocks = <&cru ACLK_HDCP>, + <&cru SCLK_HDCP>, + <&cru ACLK_IEP>, + <&cru HCLK_IEP>, + <&cru ACLK_RGA>, + <&cru HCLK_RGA>, + <&cru SCLK_RGA>; + pm_qos = <&qos_hdcp>, + <&qos_iep>, + <&qos_rga_r>, + <&qos_rga_w>; + #power-domain-cells = <0>; + }; + + power-domain@RK3228_PD_VOP { + reg = ; + clocks =<&cru ACLK_VOP>, + <&cru DCLK_VOP>, + <&cru HCLK_VOP>; + pm_qos = <&qos_vop>; + #power-domain-cells = <0>; + }; + + power-domain@RK3228_PD_VPU { + reg = ; + clocks = <&cru ACLK_VPU>, + <&cru HCLK_VPU>; + pm_qos = <&qos_vpu>; + #power-domain-cells = <0>; + }; + + power-domain@RK3228_PD_RKVDEC { + reg = ; + clocks = <&cru ACLK_RKVDEC>, + <&cru HCLK_RKVDEC>, + <&cru SCLK_VDEC_CABAC>, + <&cru SCLK_VDEC_CORE>; + pm_qos = <&qos_rkvdec_r>, + <&qos_rkvdec_w>; + #power-domain-cells = <0>; + }; + + power-domain@RK3228_PD_GPU { + reg = ; + clocks = <&cru ACLK_GPU>; + pm_qos = <&qos_gpu>; + #power-domain-cells = <0>; + }; + }; + u2phy0: usb2phy@760 { compatible = "rockchip,rk3228-usb2phy"; reg = <0x0760 0x0c>; @@ -546,6 +605,7 @@ gpu: gpu@20000000 { "ppmmu1"; clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; clock-names = "bus", "core"; + power-domains = <&power RK3228_PD_GPU>; resets = <&cru SRST_GPU_A>; status = "disabled"; }; @@ -556,6 +616,7 @@ vpu_mmu: iommu@20020800 { interrupts = ; clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; clock-names = "aclk", "iface"; + power-domains = <&power RK3228_PD_VPU>; #iommu-cells = <0>; status = "disabled"; }; @@ -566,6 +627,7 @@ vdec_mmu: iommu@20030480 { interrupts = ; clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; clock-names = "aclk", "iface"; + power-domains = <&power RK3228_PD_RKVDEC>; #iommu-cells = <0>; status = "disabled"; }; @@ -579,6 +641,7 @@ vop: vop@20050000 { resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>; reset-names = "axi", "ahb", "dclk"; iommus = <&vop_mmu>; + power-domains = <&power RK3228_PD_VOP>; status = "disabled"; vop_out: port { @@ -598,6 +661,7 @@ vop_mmu: iommu@20053f00 { interrupts = ; clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; clock-names = "aclk", "iface"; + power-domains = <&power RK3228_PD_VOP>; #iommu-cells = <0>; status = "disabled"; }; @@ -608,6 +672,7 @@ rga: rga@20060000 { interrupts = ; clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>; clock-names = "aclk", "hclk", "sclk"; + power-domains = <&power RK3228_PD_VIO>; resets = <&cru SRST_RGA>, <&cru SRST_RGA_A>, <&cru SRST_RGA_H>; reset-names = "core", "axi", "ahb"; }; @@ -618,6 +683,7 @@ iep_mmu: iommu@20070800 { interrupts = ; clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; clock-names = "aclk", "iface"; + power-domains = <&power RK3228_PD_VIO>; #iommu-cells = <0>; status = "disabled"; }; @@ -792,6 +858,51 @@ gmac: ethernet@30200000 { status = "disabled"; }; + qos_iep: qos@31030080 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31030080 0x20>; + }; + + qos_rga_w: qos@31030100 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31030100 0x20>; + }; + + qos_hdcp: qos@31030180 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31030180 0x20>; + }; + + qos_rga_r: qos@31030200 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31030200 0x20>; + }; + + qos_vpu: qos@31040000 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31040000 0x20>; + }; + + qos_gpu: qos@31050000 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31050000 0x20>; + }; + + qos_vop: qos@31060000 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31060000 0x20>; + }; + + qos_rkvdec_r: qos@31070000 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31070000 0x20>; + }; + + qos_rkvdec_w: qos@31070080 { + compatible = "rockchip,rk3228-qos", "syscon"; + reg = <0x31070080 0x20>; + }; + gic: interrupt-controller@32010000 { compatible = "arm,gic-400"; interrupt-controller;