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dt-bindings: soc: ti: pruss: Add clocks for ICSSG

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The ICSSG module has 7 clocks for each instance.

These clocks are ICSSG0_CORE_CLK, ICSSG0_IEP_CLK, ICSSG0_ICLK,
ICSSG0_UART_CLK, RGMII_MHZ_250_CLK, RGMII_MHZ_50_CLK and RGMII_MHZ_5_CLK
These clocks are described in AM64x TRM Section 6.4.3 Table 6-398.

Add these clocks to the dt binding of ICSSG.

Link: https://www.ti.com/lit/pdf/spruim2 (AM64x TRM)
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20241113110955.3876045-2-danishanwar@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
MD Danish Anwar 2024-11-13 16:39:54 +05:30 committed by Nishanth Menon
parent 0a41157c5a
commit f7ed5ae30c
1 changed files with 10 additions and 0 deletions
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10
Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml
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@ -92,6 +92,16 @@ properties:
description: |
This property is as per sci-pm-domain.txt.
clocks:
items:
- description: ICSSG_CORE Clock
- description: ICSSG_IEP Clock
- description: ICSSG_RGMII_MHZ_250 Clock
- description: ICSSG_RGMII_MHZ_50 Clock
- description: ICSSG_RGMII_MHZ_5 Clock
- description: ICSSG_UART Clock
- description: ICSSG_ICLK Clock
patternProperties:
memories@[a-f0-9]+$: