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x86/xen/msr: Remove pmu_msr_{read,write}()
As pmu_msr_{read,write}() are now wrappers of pmu_msr_chk_emulated(),
remove them and use pmu_msr_chk_emulated() directly.
As pmu_msr_chk_emulated() could easily return false in the cases where
it would set *emul to false, remove the "emul" argument and use the
return value instead.
While at it, convert the data type of MSR index to u32 in functions
called in pmu_msr_chk_emulated().
Suggested-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Suggested-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Xin Li (Intel) <xin@zytor.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Juergen Gross <jgross@suse.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <seanjc@google.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>
Cc: Uros Bizjak <ubizjak@gmail.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Link: https://lore.kernel.org/r/20250427092027.1598740-12-xin@zytor.com
This commit is contained in:
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@ -1091,7 +1091,7 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
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{
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u64 val = 0; /* Avoid uninitialized value for safe variant. */
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if (pmu_msr_read_emulated(msr, &val))
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if (pmu_msr_chk_emulated(msr, &val, true))
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return val;
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if (err)
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@ -1163,12 +1163,13 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
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default:
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val = (u64)high << 32 | low;
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if (!pmu_msr_write_emulated(msr, val)) {
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if (err)
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*err = native_write_msr_safe(msr, low, high);
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else
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native_write_msr(msr, low, high);
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}
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if (pmu_msr_chk_emulated(msr, &val, false))
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return;
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if (err)
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*err = native_write_msr_safe(msr, low, high);
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else
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native_write_msr(msr, low, high);
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}
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}
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@ -129,7 +129,7 @@ static inline uint32_t get_fam15h_addr(u32 addr)
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return addr;
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}
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static inline bool is_amd_pmu_msr(unsigned int msr)
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static bool is_amd_pmu_msr(u32 msr)
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{
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if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
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boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
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@ -195,8 +195,7 @@ static bool is_intel_pmu_msr(u32 msr_index, int *type, int *index)
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}
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}
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static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,
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int index, bool is_read)
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static bool xen_intel_pmu_emulate(u32 msr, u64 *val, int type, int index, bool is_read)
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{
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uint64_t *reg = NULL;
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struct xen_pmu_intel_ctxt *ctxt;
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@ -258,7 +257,7 @@ static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,
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return false;
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}
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static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
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static bool xen_amd_pmu_emulate(u32 msr, u64 *val, bool is_read)
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{
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uint64_t *reg = NULL;
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int i, off = 0;
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@ -299,33 +298,17 @@ static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
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return false;
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}
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static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
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bool *emul)
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bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read)
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{
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int type, index = 0;
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if (is_amd_pmu_msr(msr))
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*emul = xen_amd_pmu_emulate(msr, val, is_read);
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else if (is_intel_pmu_msr(msr, &type, &index))
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*emul = xen_intel_pmu_emulate(msr, val, type, index, is_read);
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else
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return false;
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return xen_amd_pmu_emulate(msr, val, is_read);
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return true;
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}
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if (is_intel_pmu_msr(msr, &type, &index))
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return xen_intel_pmu_emulate(msr, val, type, index, is_read);
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bool pmu_msr_read_emulated(u32 msr, u64 *val)
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{
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bool emulated;
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return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
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}
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bool pmu_msr_write_emulated(u32 msr, u64 val)
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{
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bool emulated;
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return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
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return false;
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}
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static u64 xen_amd_read_pmc(int counter)
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@ -271,8 +271,7 @@ void xen_pmu_finish(int cpu);
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static inline void xen_pmu_init(int cpu) {}
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static inline void xen_pmu_finish(int cpu) {}
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#endif
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bool pmu_msr_read_emulated(u32 msr, u64 *val);
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bool pmu_msr_write_emulated(u32 msr, u64 val);
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bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read);
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int pmu_apic_update(uint32_t reg);
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u64 xen_read_pmc(int counter);
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