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dt-bindings: pinctrl: realtek: Add RTD1625 pinctrl binding

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Add device tree bindings for RTD1625.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Tzuyi Chang <tychang@realtek.com>
Co-developed-by: Yu-Chun Lin <eleanor.lin@realtek.com>
Signed-off-by: Yu-Chun Lin <eleanor.lin@realtek.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Tzuyi Chang 2026-03-17 19:54:07 +08:00 committed by Linus Walleij
parent 56624479a9
commit f6ea7004e9
1 changed files with 260 additions and 0 deletions
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Documentation/devicetree/bindings/pinctrl/realtek,rtd1625-pinctrl.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2025 Realtek Semiconductor Corporation
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1625-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Realtek DHC RTD1625 Pin Controller
maintainers:
- Tzuyi Chang <tychang@realtek.com>
- Yu-Chun Lin <eleanor.lin@realtek.com>
description:
The Realtek DHC RTD1625 is a high-definition media processor SoC. The
RTD1625 pin controller is used to control pin function, pull-up/down
resistors, drive strength, slew rate, Schmitt trigger, power source
(I/O output voltage), input threshold domain selection and a higher-VIL mode.
properties:
compatible:
items:
- enum:
- realtek,rtd1625-iso-pinctrl
- realtek,rtd1625-main2-pinctrl
- realtek,rtd1625-isom-pinctrl
- realtek,rtd1625-ve4-pinctrl
reg:
maxItems: 1
patternProperties:
'-pins$':
type: object
allOf:
- $ref: pincfg-node.yaml#
- $ref: pinmux-node.yaml#
properties:
pins:
items:
enum: [gpio_0, gpio_1, gpio_2, gpio_3, gpio_4, gpio_5, gpio_6,
gpio_7, gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, gpio_13,
gpio_14, gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, gpio_20,
gpio_21, gpio_22, gpio_23, gpio_24, gpio_25, gpio_28, gpio_29,
gpio_30, gpio_31, gpio_32, gpio_33, gpio_34, gpio_35, gpio_40,
gpio_41, gpio_42, gpio_43, gpio_44, gpio_45, gpio_46, gpio_47,
gpio_48, gpio_49, gpio_50, gpio_51, gpio_52, gpio_53, gpio_54,
gpio_55, gpio_56, gpio_57, gpio_58, gpio_59, gpio_60, gpio_61,
gpio_62, gpio_63, gpio_64, gpio_65, gpio_66, gpio_67, gpio_80,
gpio_81, gpio_82, gpio_83, gpio_84, gpio_85, gpio_86, gpio_87,
gpio_88, gpio_89, gpio_90, gpio_91, gpio_92, gpio_93, gpio_94,
gpio_95, gpio_96, gpio_97, gpio_98, gpio_99, gpio_100,
gpio_101, gpio_102, gpio_103, gpio_104, gpio_105, gpio_106,
gpio_107, gpio_108, gpio_109, gpio_110, gpio_111, gpio_112,
gpio_128, gpio_129, gpio_130, gpio_131, gpio_132, gpio_133,
gpio_134, gpio_135, gpio_136, gpio_137, gpio_138, gpio_139,
gpio_140, gpio_141, gpio_142, gpio_143, gpio_144, gpio_145,
gpio_146, gpio_147, gpio_148, gpio_149, gpio_150, gpio_151,
gpio_152, gpio_153, gpio_154, gpio_155, gpio_156, gpio_157,
gpio_158, gpio_159, gpio_160, gpio_161, gpio_162, gpio_163,
gpio_164, gpio_165, ai_i2s1_loc, ao_i2s1_loc, arm_trace_dbg_en,
csi_vdsel, ejtag_acpu_loc, ejtag_aucpu0_loc, ejtag_aucpu1_loc,
ejtag_pcpu_loc, ejtag_scpu_loc, ejtag_ve2_loc, emmc_clk,
emmc_cmd, emmc_data_0, emmc_data_1, emmc_data_2, emmc_data_3,
emmc_data_4, emmc_data_5, emmc_data_6, emmc_data_7,
emmc_dd_sb, emmc_rst_n, etn_phy_loc, hif_clk, hif_data,
hif_en, hif_rdy, hi_width, i2c6_loc, ir_rx_loc, rgmii_vdsel,
sf_en, spdif_in_mode, spdif_loc, uart0_loc, usb_cc1, usb_cc2,
ve4_uart_loc]
function:
enum: [gpio, ai_i2s0, ai_i2s2, ai_tdm0, ai_tdm1, ai_tdm2, ao_i2s0,
ao_i2s2, ao_tdm0, ao_tdm1, ao_tdm2, csi0, csi1, csi_1v2, csi_1v8,
csi_2v5, csi_3v3, dmic0, dmic1, dmic2, dptx_hpd, edptx_hdp, emmc,
gspi0, gspi1, gspi2, hi_width_1bit, hi_width_disable, i2c0, i2c1,
i2c3, i2c4, i2c5, i2c7, iso_tristate, pcie0, pcie1, pcm, pctrl,
pwm4, pwm5, pwm6, rgmii, rgmii_1v2, rgmii_1v8, rgmii_2v5,
rgmii_3v3, rmii, sd, sdio, sf_disable, sf_enable,
spdif_in_coaxial, spdif_in_gpio, spdif_out, spi, ts0, ts1, uart1,
uart2, uart3, uart4, uart5, uart6, uart7, uart8, uart9, uart10,
usb_cc1, usb_cc2, vi0_dtv, vi1_dtv, vtc_ao_i2s, vtc_dmic,
vtc_i2s, ai_i2s1_loc0, ai_i2s1_loc1, ao_i2s0_loc0, ao_i2s0_loc1,
ao_i2s1_loc0, ao_i2s1_loc1, ao_tdm1_loc0, ao_tdm1_loc1,
etn_led_loc0, etn_led_loc1, etn_phy_loc0, etn_phy_loc1,
i2c6_loc0, i2c6_loc1, ir_rx_loc0, ir_rx_loc1, pwm0_loc0,
pwm0_loc1, pwm0_loc2, pwm0_loc3, pwm1_loc0, pwm1_loc1, pwm2_loc0,
pwm2_loc1, pwm3_loc0, pwm3_loc1, spdif_loc0, spdif_loc1,
uart0_loc0, uart0_loc1, ve4_uart_loc0, ve4_uart_loc1,
ve4_uart_loc2, acpu_ejtag_loc0, acpu_ejtag_loc1, acpu_ejtag_loc2,
aucpu0_ejtag_loc0, aucpu0_ejtag_loc1, aucpu0_ejtag_loc2,
aucpu1_ejtag_loc0, aucpu1_ejtag_loc1, aucpu1_ejtag_loc2,
aupu0_ejtag_loc1, aupu1_ejtag_loc1, gpu_ejtag_loc0,
pcpu_ejtag_loc0, pcpu_ejtag_loc1, pcpu_ejtag_loc2,
scpu_ejtag_loc0, scpu_ejtag_loc1, scpu_ejtag_loc2,
ve2_ejtag_loc0, ve2_ejtag_loc1, ve2_ejtag_loc2, pll_test_loc0,
pll_test_loc1, dbg_out1, isom_dbg_out, arm_trace_debug_disable,
arm_trace_debug_enable]
drive-strength:
enum: [4, 8]
bias-pull-down: true
bias-pull-up: true
bias-disable: true
input-schmitt-enable: true
input-schmitt-disable: true
input-voltage-microvolt:
description: |
Select the input receiver voltage domain for the pin.
Valid arguments are:
- 1800000: 1.8V input logic level
- 3300000: 3.3V input logic level
enum: [1800000, 3300000]
drive-push-pull: true
power-source:
description: |
Valid arguments are described as below:
0: power supply of 1.8V
1: power supply of 3.3V
enum: [0, 1]
slew-rate:
description: |
Valid arguments are described as below:
1: ~1ns falling time
10: ~10ns falling time
20: ~20ns falling time
30: ~30ns falling time
enum: [1, 10, 20, 30]
realtek,drive-strength-p:
description: |
Some of pins can be driven using the P-MOS and N-MOS transistor to
achieve finer adjustments. The block-diagram representation is as
follows:
VDD
|
||--+
+-----o|| P-MOS-FET
| ||--+
IN --+ +----- out
| ||--+
+------|| N-MOS-FET
||--+
|
GND
The driving strength of the P-MOS/N-MOS transistors impacts the
waveform's rise/fall times. Greater driving strength results in
shorter rise/fall times. Each P-MOS and N-MOS transistor offers
8 configurable levels (0 to 7), with higher values indicating
greater driving strength, contributing to achieving the desired
speed.
The realtek,drive-strength-p is used to control the driving strength
of the P-MOS output.
This value is not a simple count of transistors. Instead, it
represents a weighted configuration. There is a base driving
capability (even at value 0), and each bit adds a different weight to
the total strength. The resulting current is non-linear and varies
significantly based on the IO voltage (1.8V vs 3.3V) and the specific
pad group.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 7
realtek,drive-strength-n:
description: |
Similar to the realtek,drive-strength-p, the realtek,drive-strength-n
is used to control the driving strength of the N-MOS output.
This property uses the same weighted configuration logic where values
0-7 represent non-linear strength adjustments rather than a transistor
count.
Higher values indicate greater driving strength, resulting in shorter
fall times.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 7
realtek,duty-cycle:
description: |
An integer describing the level to adjust the output pulse width, it
provides a fixed nanosecond-level adjustment to the rising/falling
edges of an existing signal. It is used for Signal Integrity tuning
(adding/subtracting delay to fine-tune the high/low duration), rather
than generating a specific PWM frequency.
Valid arguments are described as below:
0: 0ns
2: + 0.25ns
3: + 0.5ns
4: -0.25ns
5: -0.5ns
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 2, 3, 4, 5]
realtek,high-vil-microvolt:
description: |
The threshold value for the input receiver's LOW recognition (VIL).
This property is used to address specific HDMI I2C compatibility
issues where some sinks (TVs) have weak pull-down capabilities and
fail to pull the bus voltage below the standard VIL threshold
(~0.7V).
Setting this property to 1100000 (1.1V) enables a specialized input
receiver mode that raises the effective VIL threshold to improve
detection.
enum: [1100000]
required:
- pins
additionalProperties: false
required:
- compatible
- reg
additionalProperties: false
examples:
- |
pinctrl@4e000 {
compatible = "realtek,rtd1625-iso-pinctrl";
reg = <0x4e000 0x130>;
emmc-hs200-pins {
pins = "emmc_clk",
"emmc_cmd",
"emmc_data_0",
"emmc_data_1",
"emmc_data_2",
"emmc_data_3",
"emmc_data_4",
"emmc_data_5",
"emmc_data_6",
"emmc_data_7";
function = "emmc";
realtek,drive-strength-p = <2>;
realtek,drive-strength-n = <2>;
};
i2c-0-pins {
pins = "gpio_12",
"gpio_13";
function = "i2c0";
drive-strength = <4>;
};
};