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clk: qcom: gcc-sc8180x: Refactor to use qcom_cc_driver_data

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Use a qcom_cc_driver_data struct instead of a long custom probe
callback to align with modern qcom/gcc-*.c style.

No functional change intended.

Signed-off-by: Val Packett <val@packett.cool>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260312112321.370983-7-val@packett.cool
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Val Packett 2026-03-12 08:12:11 -03:00 committed by Bjorn Andersson
parent 7332206626
commit f641773e10
1 changed files with 31 additions and 30 deletions
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61
drivers/clk/qcom/gcc-sc8180x.c
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@ -4605,7 +4605,7 @@ static const struct qcom_reset_map gcc_sc8180x_resets[] = {
[GCC_VIDEO_AXI1_CLK_BCR] = { .reg = 0xb028, .bit = 2, .udelay = 150 },
};
static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = {
static const struct clk_rcg_dfs_data gcc_sc8180x_dfs_clocks[] = {
DEFINE_RCG_DFS(gcc_qupv3_wrap0_s0_clk_src),
DEFINE_RCG_DFS(gcc_qupv3_wrap0_s1_clk_src),
DEFINE_RCG_DFS(gcc_qupv3_wrap0_s2_clk_src),
@ -4647,6 +4647,19 @@ static struct gdsc *gcc_sc8180x_gdscs[] = {
[HLOS1_VOTE_TURING_MMU_TBU1_GDSC] = &hlos1_vote_turing_mmu_tbu1_gdsc,
};
static u32 gcc_sc8180x_critical_cbcrs[] = {
0xb004, /* GCC_VIDEO_AHB_CLK */
0xb008, /* GCC_CAMERA_AHB_CLK */
0xb00c, /* GCC_DISP_AHB_CLK */
0xb040, /* GCC_VIDEO_XO_CLK */
0xb044, /* GCC_CAMERA_XO_CLK */
0xb048, /* GCC_DISP_XO_CLK */
0x48004, /* GCC_CPUSS_GNOC_CLK */
0x48190, /* GCC_CPUSS_DVM_BUS_CLK */
0x4d004, /* GCC_NPU_CFG_AHB_CLK */
0x71004, /* GCC_GPU_CFG_AHB_CLK */
};
static const struct regmap_config gcc_sc8180x_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
@ -4655,6 +4668,21 @@ static const struct regmap_config gcc_sc8180x_regmap_config = {
.fast_io = true,
};
static void clk_sc8180x_regs_configure(struct device *dev, struct regmap *regmap)
{
/* Disable the GPLL0 active input to NPU and GPU via MISC registers */
regmap_update_bits(regmap, 0x4d110, 0x3, 0x3);
regmap_update_bits(regmap, 0x71028, 0x3, 0x3);
}
static struct qcom_cc_driver_data gcc_sc8180x_driver_data = {
.clk_cbcrs = gcc_sc8180x_critical_cbcrs,
.num_clk_cbcrs = ARRAY_SIZE(gcc_sc8180x_critical_cbcrs),
.dfs_rcgs = gcc_sc8180x_dfs_clocks,
.num_dfs_rcgs = ARRAY_SIZE(gcc_sc8180x_dfs_clocks),
.clk_regs_configure = clk_sc8180x_regs_configure,
};
static const struct qcom_cc_desc gcc_sc8180x_desc = {
.config = &gcc_sc8180x_regmap_config,
.clks = gcc_sc8180x_clocks,
@ -4664,6 +4692,7 @@ static const struct qcom_cc_desc gcc_sc8180x_desc = {
.gdscs = gcc_sc8180x_gdscs,
.num_gdscs = ARRAY_SIZE(gcc_sc8180x_gdscs),
.use_rpm = true,
.driver_data = &gcc_sc8180x_driver_data,
};
static const struct of_device_id gcc_sc8180x_match_table[] = {
@ -4674,35 +4703,7 @@ MODULE_DEVICE_TABLE(of, gcc_sc8180x_match_table);
static int gcc_sc8180x_probe(struct platform_device *pdev)
{
struct regmap *regmap;
int ret;
regmap = qcom_cc_map(pdev, &gcc_sc8180x_desc);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
/* Keep some clocks always-on */
qcom_branch_set_clk_en(regmap, 0xb004); /* GCC_VIDEO_AHB_CLK */
qcom_branch_set_clk_en(regmap, 0xb008); /* GCC_CAMERA_AHB_CLK */
qcom_branch_set_clk_en(regmap, 0xb00c); /* GCC_DISP_AHB_CLK */
qcom_branch_set_clk_en(regmap, 0xb040); /* GCC_VIDEO_XO_CLK */
qcom_branch_set_clk_en(regmap, 0xb044); /* GCC_CAMERA_XO_CLK */
qcom_branch_set_clk_en(regmap, 0xb048); /* GCC_DISP_XO_CLK */
qcom_branch_set_clk_en(regmap, 0x48004); /* GCC_CPUSS_GNOC_CLK */
qcom_branch_set_clk_en(regmap, 0x48190); /* GCC_CPUSS_DVM_BUS_CLK */
qcom_branch_set_clk_en(regmap, 0x4d004); /* GCC_NPU_CFG_AHB_CLK */
qcom_branch_set_clk_en(regmap, 0x71004); /* GCC_GPU_CFG_AHB_CLK */
/* Disable the GPLL0 active input to NPU and GPU via MISC registers */
regmap_update_bits(regmap, 0x4d110, 0x3, 0x3);
regmap_update_bits(regmap, 0x71028, 0x3, 0x3);
ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks,
ARRAY_SIZE(gcc_dfs_clocks));
if (ret)
return ret;
return qcom_cc_really_probe(&pdev->dev, &gcc_sc8180x_desc, regmap);
return qcom_cc_probe(pdev, &gcc_sc8180x_desc);
}
static struct platform_driver gcc_sc8180x_driver = {