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riscv: Add Ziccamoa, Ziccif, Ziccrse, and Za64rs to cpufeature and hwprobe

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Add Ziccamoa, Ziccif, and Za64rs to riscv_isa_ext[] so they can be
parsed from devicetree/ACPI ISA strings. Ziccrse is already present
in cpufeature; this patch only adds its hwprobe exposure.

Expose all four extensions via hwprobe through new bits in
RISCV_HWPROBE_KEY_IMA_EXT_1 (RISCV_HWPROBE_EXT_ZICCAMOA, _ZICCIF,
_ZICCRSE, _ZA64RS), so userspace can probe each of these
RVA23U64-mandatory extensions individually.

Reviewed-by: Jesse Taube <jtaubepe@redhat.com>
Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
Signed-off-by: Guodong Xu <docular.xu@gmail.com>
Link: https://patch.msgid.link/20260701-rva23u64-hwprobe-v2-v5-6-2c61f94a695a@gmail.com
[pjw@kernel.org: updated to apply]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
This commit is contained in:
Andrew Jones 2026-08-07 19:24:33 -06:00 committed by Paul Walmsley
parent 3cd63bc30c
commit f61959a3a8
5 changed files with 30 additions and 0 deletions
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16
Documentation/arch/riscv/hwprobe.rst
View File

@ -405,3 +405,19 @@ The following keys are defined:
* :c:macro:`RISCV_HWPROBE_EXT_ZICCLSM`: The Zicclsm extension is supported,
as defined in the RISC-V Profiles specification starting from commit
b1d80660 ("Updated to ratified state.")
* :c:macro:`RISCV_HWPROBE_EXT_ZICCAMOA`: The Ziccamoa extension is supported,
as defined in the RISC-V Profiles specification starting from commit
b1d80660 ("Updated to ratified state.")
* :c:macro:`RISCV_HWPROBE_EXT_ZICCIF`: The Ziccif extension is supported,
as defined in the RISC-V Profiles specification starting from commit
b1d80660 ("Updated to ratified state.")
* :c:macro:`RISCV_HWPROBE_EXT_ZICCRSE`: The Ziccrse extension is supported,
as defined in the RISC-V Profiles specification starting from commit
b1d80660 ("Updated to ratified state.")
* :c:macro:`RISCV_HWPROBE_EXT_ZA64RS`: The Za64rs extension is supported,
as defined in the RISC-V Profiles specification starting from commit
b1d80660 ("Updated to ratified state.")

3
arch/riscv/include/asm/hwcap.h
View File

@ -119,6 +119,9 @@
#define RISCV_ISA_EXT_SMCDELEG 110
#define RISCV_ISA_EXT_SSQOSID 111
#define RISCV_ISA_EXT_ZICCLSM 112
#define RISCV_ISA_EXT_ZICCAMOA 113
#define RISCV_ISA_EXT_ZICCIF 114
#define RISCV_ISA_EXT_ZA64RS 115
#define RISCV_ISA_EXT_XLINUXENVCFG 127

4
arch/riscv/include/uapi/asm/hwprobe.h
View File

@ -117,6 +117,10 @@ struct riscv_hwprobe {
#define RISCV_HWPROBE_KEY_IMA_EXT_1 16
#define RISCV_HWPROBE_EXT_ZICFISS (1ULL << 0)
#define RISCV_HWPROBE_EXT_ZICCLSM (1ULL << 1)
#define RISCV_HWPROBE_EXT_ZICCAMOA (1ULL << 2)
#define RISCV_HWPROBE_EXT_ZICCIF (1ULL << 3)
#define RISCV_HWPROBE_EXT_ZICCRSE (1ULL << 4)
#define RISCV_HWPROBE_EXT_ZA64RS (1ULL << 5)
/* Increase RISCV_HWPROBE_MAX_KEY when adding items. */

3
arch/riscv/kernel/cpufeature.c
View File

@ -525,6 +525,8 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = {
__RISCV_ISA_EXT_SUPERSET_VALIDATE(zicbom, RISCV_ISA_EXT_ZICBOM, riscv_xlinuxenvcfg_exts, riscv_ext_zicbom_validate),
__RISCV_ISA_EXT_DATA_VALIDATE(zicbop, RISCV_ISA_EXT_ZICBOP, riscv_ext_zicbop_validate),
__RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xlinuxenvcfg_exts, riscv_ext_zicboz_validate),
__RISCV_ISA_EXT_DATA(ziccamoa, RISCV_ISA_EXT_ZICCAMOA),
__RISCV_ISA_EXT_DATA(ziccif, RISCV_ISA_EXT_ZICCIF),
__RISCV_ISA_EXT_DATA(zicclsm, RISCV_ISA_EXT_ZICCLSM),
__RISCV_ISA_EXT_DATA(ziccrse, RISCV_ISA_EXT_ZICCRSE),
__RISCV_ISA_EXT_SUPERSET_VALIDATE(zicfilp, RISCV_ISA_EXT_ZICFILP, riscv_xlinuxenvcfg_exts,
@ -539,6 +541,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = {
__RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),
__RISCV_ISA_EXT_DATA(zihpm, RISCV_ISA_EXT_ZIHPM),
__RISCV_ISA_EXT_DATA(zimop, RISCV_ISA_EXT_ZIMOP),
__RISCV_ISA_EXT_DATA(za64rs, RISCV_ISA_EXT_ZA64RS),
__RISCV_ISA_EXT_DATA(zaamo, RISCV_ISA_EXT_ZAAMO),
__RISCV_ISA_EXT_DATA(zabha, RISCV_ISA_EXT_ZABHA),
__RISCV_ISA_EXT_DATA(zacas, RISCV_ISA_EXT_ZACAS),

4
arch/riscv/kernel/sys_hwprobe.c
View File

@ -203,6 +203,10 @@ static void hwprobe_isa_ext1(struct riscv_hwprobe *pair,
*/
EXT_KEY(isainfo->isa, ZICFISS, pair->value, missing);
EXT_KEY(isainfo->isa, ZICCLSM, pair->value, missing);
EXT_KEY(isainfo->isa, ZICCAMOA, pair->value, missing);
EXT_KEY(isainfo->isa, ZICCIF, pair->value, missing);
EXT_KEY(isainfo->isa, ZICCRSE, pair->value, missing);
EXT_KEY(isainfo->isa, ZA64RS, pair->value, missing);
}
/* Now turn off reporting features if any CPU is missing it. */