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arm64: dts: rockchip: use gated-fixed-clock for pcie-refclk on rk3588-jaguar
Using a combination of fixed clock and gpio-gate clock works but does not describe the actual hardware. Use the gated-fixed-clock binding to describe this in a nicer way. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://patch.msgid.link/20260210080303.680403-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -86,25 +86,16 @@ led-1 {
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};
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};
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/*
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* 100MHz reference clock for PCIe peripherals from PI6C557-05BLE
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* clock generator.
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* The clock output is gated via the OE pin on the clock generator.
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* This is modeled as a fixed-clock plus a gpio-gate-clock.
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*/
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pcie_refclk_gen: pcie-refclk-gen-clock {
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compatible = "fixed-clock";
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/* 100MHz PCIe reference clock from PI6C557-05BLE */
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pcie_refclk: pcie-clock-generator {
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compatible = "gated-fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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};
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pcie_refclk: pcie-refclk-clock {
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compatible = "gpio-gate-clock";
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clocks = <&pcie_refclk_gen>;
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#clock-cells = <0>;
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clock-output-names = "pcie-refclk-clock";
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enable-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>; /* PCIE30X4_CLKREQN_M0 */
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pinctrl-names = "default";
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pinctrl-0 = <&pcie30x4_clkreqn_m0>;
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vdd-supply = <&vcca_3v3_s0>;
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};
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pps {
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