arm64: dts: rockchip: use gated-fixed-clock for pcie-refclk on rk3588-jaguar

Using a combination of fixed clock and gpio-gate clock works but does
not describe the actual hardware. Use the gated-fixed-clock binding
to describe this in a nicer way.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://patch.msgid.link/20260210080303.680403-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Heiko Stuebner 2026-02-10 09:02:59 +01:00 committed by Heiko Stuebner
parent 35dad33703
commit f5e5270172

View File

@ -86,25 +86,16 @@ led-1 {
};
};
/*
* 100MHz reference clock for PCIe peripherals from PI6C557-05BLE
* clock generator.
* The clock output is gated via the OE pin on the clock generator.
* This is modeled as a fixed-clock plus a gpio-gate-clock.
*/
pcie_refclk_gen: pcie-refclk-gen-clock {
compatible = "fixed-clock";
/* 100MHz PCIe reference clock from PI6C557-05BLE */
pcie_refclk: pcie-clock-generator {
compatible = "gated-fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
};
pcie_refclk: pcie-refclk-clock {
compatible = "gpio-gate-clock";
clocks = <&pcie_refclk_gen>;
#clock-cells = <0>;
clock-output-names = "pcie-refclk-clock";
enable-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>; /* PCIE30X4_CLKREQN_M0 */
pinctrl-names = "default";
pinctrl-0 = <&pcie30x4_clkreqn_m0>;
vdd-supply = <&vcca_3v3_s0>;
};
pps {