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spi: dt-bindings: mpfs-spi: permit resets

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CoreSPI, CoreQSPI and the hardened versions of them on mpfs and
pic64gx have a reset pin. For the first two, usually this is wired to
a common fabric reset not managed by software and for the latter two
the platform firmware takes them out of reset on first-party boards
(or those using modified versions of the vendor firmware), but not all
boards may take this approach. Permit providing a reset in devicetree
for Linux, or other devicetree-consuming software, to use.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260303-deceiver-rack-82f2b89eac40@spud
Signed-off-by: Mark Brown <broonie@kernel.org>
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Conor Dooley 2026-03-03 16:41:50 +00:00 committed by Mark Brown
parent a4f23717b1
commit f5d09914d4
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Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
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@ -41,6 +41,9 @@ properties:
clocks:
maxItems: 1
resets:
maxItems: 1
microchip,apb-datawidth:
description: APB bus data width in bits.
$ref: /schemas/types.yaml#/definitions/uint32