github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-07-28 10:09:10 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

remoteproc: imx_rproc: Add support for i.MX94

Browse Source 
Add basic remoteproc support for the i.MX94 M-core processors, including
address translation tables(dev addr is from view of remote processor,
sys addr is from view of main processor) and device configuration data for
the CM70, CM71, and CM33S cores.

Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20260427-imx943-rproc-v4-3-68d7c7253acd@nxp.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
This commit is contained in:
Peng Fan 2026-04-27 10:41:26 +08:00 committed by Mathieu Poirier
parent dd0dd12113
commit f4d97de947
1 changed files with 65 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

65
drivers/remoteproc/imx_rproc.c
View File

@ -145,6 +145,41 @@ static const struct imx_rproc_att imx_rproc_att_imx95_m7[] = {
{ 0x80000000, 0x80000000, 0x50000000, 0 },
};
static const struct imx_rproc_att imx_rproc_att_imx94_m70[] = {
/* dev addr , sys addr , size , flags */
/* TCM CODE NON-SECURE */
{ 0x00000000, 0x203C0000, 0x00040000, ATT_OWN | ATT_IOMEM },
/* TCM SYS NON-SECURE*/
{ 0x20000000, 0x20400000, 0x00040000, ATT_OWN | ATT_IOMEM },
/* DDR */
{ 0x80000000, 0x80000000, 0x10000000, 0 },
};
static const struct imx_rproc_att imx_rproc_att_imx94_m71[] = {
/* dev addr , sys addr , size , flags */
/* TCM CODE NON-SECURE */
{ 0x00000000, 0x202C0000, 0x00040000, ATT_OWN | ATT_IOMEM },
/* TCM SYS NON-SECURE*/
{ 0x20000000, 0x20300000, 0x00040000, ATT_OWN | ATT_IOMEM },
/* DDR */
{ 0x80000000, 0x80000000, 0x10000000, 0 },
};
static const struct imx_rproc_att imx_rproc_att_imx94_m33s[] = {
/* dev addr , sys addr , size , flags */
/* TCM CODE NON-SECURE */
{ 0x0FFC0000, 0x209C0000, 0x00040000, ATT_OWN | ATT_IOMEM },
/* TCM SYS NON-SECURE */
{ 0x20000000, 0x20A00000, 0x00040000, ATT_OWN | ATT_IOMEM },
/* M33S OCRAM NON-SECURE */
{ 0x20800000, 0x20800000, 0x180000, ATT_OWN | ATT_IOMEM },
/* DDR */
{ 0x80000000, 0x80000000, 0x10000000, 0 },
};
static const struct imx_rproc_att imx_rproc_att_imx93[] = {
/* dev addr , sys addr , size , flags */
/* TCM CODE NON-SECURE */
@ -1477,6 +1512,33 @@ static const struct imx_rproc_dcfg imx_rproc_cfg_imx93 = {
.flags = IMX_RPROC_NEED_CLKS,
};
static const struct imx_rproc_dcfg imx_rproc_cfg_imx94_m70 = {
.att = imx_rproc_att_imx94_m70,
.att_size = ARRAY_SIZE(imx_rproc_att_imx94_m70),
.ops = &imx_rproc_ops_sm_lmm,
.cpuid = 1,
.lmid = 2,
.reset_vector_mask = GENMASK_U32(31, 16),
};
static const struct imx_rproc_dcfg imx_rproc_cfg_imx94_m71 = {
.att = imx_rproc_att_imx94_m71,
.att_size = ARRAY_SIZE(imx_rproc_att_imx94_m71),
.ops = &imx_rproc_ops_sm_lmm,
.cpuid = 7,
.lmid = 3,
.reset_vector_mask = GENMASK_U32(31, 16),
};
static const struct imx_rproc_dcfg imx_rproc_cfg_imx94_m33s = {
.att = imx_rproc_att_imx94_m33s,
.att_size = ARRAY_SIZE(imx_rproc_att_imx94_m33s),
.ops = &imx_rproc_ops_sm_lmm,
.cpuid = 8,
.lmid = 1,
.reset_vector_mask = GENMASK_U32(31, 16),
};
static const struct imx_rproc_dcfg imx_rproc_cfg_imx95_m7 = {
.att = imx_rproc_att_imx95_m7,
.att_size = ARRAY_SIZE(imx_rproc_att_imx95_m7),
@ -1501,6 +1563,9 @@ static const struct of_device_id imx_rproc_of_match[] = {
{ .compatible = "fsl,imx8qm-cm4", .data = &imx_rproc_cfg_imx8qm },
{ .compatible = "fsl,imx8ulp-cm33", .data = &imx_rproc_cfg_imx8ulp },
{ .compatible = "fsl,imx93-cm33", .data = &imx_rproc_cfg_imx93 },
{ .compatible = "fsl,imx94-cm70", .data = &imx_rproc_cfg_imx94_m70 },
{ .compatible = "fsl,imx94-cm71", .data = &imx_rproc_cfg_imx94_m71 },
{ .compatible = "fsl,imx94-cm33s", .data = &imx_rproc_cfg_imx94_m33s },
{ .compatible = "fsl,imx95-cm7", .data = &imx_rproc_cfg_imx95_m7 },
{},
};