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staging: media: atomisp: remove dead code in ov2722.h
Remove unused code blocks enclosed in #if 0 to clean up the code. Signed-off-by: Taekyung Oh <ohxorud@ohxorud.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
This commit is contained in:
Taekyung Oh
Sakari Ailus
parent
85354d9842
commit
f4705de3a9
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@ -232,339 +232,6 @@ struct ov2722_write_ctrl {
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struct ov2722_write_buffer buffer;
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};
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/*
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* Register settings for various resolution
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*/
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#if 0
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static const struct ov2722_reg ov2722_QVGA_30fps[] = {
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{OV2722_8BIT, 0x3718, 0x10},
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{OV2722_8BIT, 0x3702, 0x0c},
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{OV2722_8BIT, 0x373a, 0x1c},
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{OV2722_8BIT, 0x3715, 0x01},
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{OV2722_8BIT, 0x3703, 0x0c},
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{OV2722_8BIT, 0x3705, 0x06},
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{OV2722_8BIT, 0x3730, 0x0e},
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{OV2722_8BIT, 0x3704, 0x1c},
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{OV2722_8BIT, 0x3f06, 0x00},
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{OV2722_8BIT, 0x371c, 0x00},
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{OV2722_8BIT, 0x371d, 0x46},
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{OV2722_8BIT, 0x371e, 0x00},
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{OV2722_8BIT, 0x371f, 0x63},
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{OV2722_8BIT, 0x3708, 0x61},
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{OV2722_8BIT, 0x3709, 0x12},
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{OV2722_8BIT, 0x3800, 0x01},
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{OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */
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{OV2722_8BIT, 0x3802, 0x00},
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{OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32 */
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{OV2722_8BIT, 0x3804, 0x06},
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{OV2722_8BIT, 0x3805, 0x95}, /* H crop end: 1685 */
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{OV2722_8BIT, 0x3806, 0x04},
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{OV2722_8BIT, 0x3807, 0x27}, /* V crop end: 1063 */
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{OV2722_8BIT, 0x3808, 0x01},
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{OV2722_8BIT, 0x3809, 0x50}, /* H output size: 336 */
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{OV2722_8BIT, 0x380a, 0x01},
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{OV2722_8BIT, 0x380b, 0x00}, /* V output size: 256 */
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/* H blank timing */
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{OV2722_8BIT, 0x380c, 0x08},
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{OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */
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{OV2722_8BIT, 0x380e, 0x04},
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{OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */
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{OV2722_8BIT, 0x3810, 0x00},
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{OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */
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{OV2722_8BIT, 0x3812, 0x00},
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{OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */
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{OV2722_8BIT, 0x3820, 0xc0},
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{OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/
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{OV2722_8BIT, 0x3814, 0x71},
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{OV2722_8BIT, 0x3815, 0x71},
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{OV2722_8BIT, 0x3612, 0x49},
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{OV2722_8BIT, 0x3618, 0x00},
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{OV2722_8BIT, 0x3a08, 0x01},
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{OV2722_8BIT, 0x3a09, 0xc3},
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{OV2722_8BIT, 0x3a0a, 0x01},
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{OV2722_8BIT, 0x3a0b, 0x77},
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{OV2722_8BIT, 0x3a0d, 0x00},
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{OV2722_8BIT, 0x3a0e, 0x00},
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{OV2722_8BIT, 0x4520, 0x09},
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{OV2722_8BIT, 0x4837, 0x1b},
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{OV2722_8BIT, 0x3000, 0xff},
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{OV2722_8BIT, 0x3001, 0xff},
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{OV2722_8BIT, 0x3002, 0xf0},
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{OV2722_8BIT, 0x3600, 0x08},
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{OV2722_8BIT, 0x3621, 0xc0},
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{OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */
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{OV2722_8BIT, 0x3633, 0x63},
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{OV2722_8BIT, 0x3634, 0x24},
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{OV2722_8BIT, 0x3f01, 0x0c},
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{OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */
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{OV2722_8BIT, 0x3614, 0xf0},
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{OV2722_8BIT, 0x3630, 0x2d},
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{OV2722_8BIT, 0x370b, 0x62},
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{OV2722_8BIT, 0x3706, 0x61},
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{OV2722_8BIT, 0x4000, 0x02},
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{OV2722_8BIT, 0x4002, 0xc5},
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{OV2722_8BIT, 0x4005, 0x08},
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{OV2722_8BIT, 0x404f, 0x84},
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{OV2722_8BIT, 0x4051, 0x00},
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{OV2722_8BIT, 0x5000, 0xff},
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{OV2722_8BIT, 0x3a18, 0x00},
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{OV2722_8BIT, 0x3a19, 0x80},
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{OV2722_8BIT, 0x4521, 0x00},
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{OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */
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{OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */
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{OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */
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{OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */
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{OV2722_8BIT, 0x370c, 0x0c},
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{OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */
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{OV2722_8BIT, 0x3035, 0x00},
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{OV2722_8BIT, 0x3036, 0x26},
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{OV2722_8BIT, 0x3037, 0xa1},
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{OV2722_8BIT, 0x303e, 0x19},
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{OV2722_8BIT, 0x3038, 0x06},
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{OV2722_8BIT, 0x3018, 0x04},
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/* Added for power optimization */
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{OV2722_8BIT, 0x3000, 0x00},
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{OV2722_8BIT, 0x3001, 0x00},
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{OV2722_8BIT, 0x3002, 0x00},
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{OV2722_8BIT, 0x3a0f, 0x40},
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{OV2722_8BIT, 0x3a10, 0x38},
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{OV2722_8BIT, 0x3a1b, 0x48},
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{OV2722_8BIT, 0x3a1e, 0x30},
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{OV2722_8BIT, 0x3a11, 0x90},
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{OV2722_8BIT, 0x3a1f, 0x10},
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{OV2722_8BIT, 0x3011, 0x22},
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{OV2722_8BIT, 0x3a00, 0x58},
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{OV2722_8BIT, 0x3503, 0x17},
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{OV2722_8BIT, 0x3500, 0x00},
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{OV2722_8BIT, 0x3501, 0x46},
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{OV2722_8BIT, 0x3502, 0x00},
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{OV2722_8BIT, 0x3508, 0x00},
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{OV2722_8BIT, 0x3509, 0x10},
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{OV2722_TOK_TERM, 0, 0},
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};
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static const struct ov2722_reg ov2722_480P_30fps[] = {
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{OV2722_8BIT, 0x3718, 0x10},
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{OV2722_8BIT, 0x3702, 0x18},
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{OV2722_8BIT, 0x373a, 0x3c},
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{OV2722_8BIT, 0x3715, 0x01},
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{OV2722_8BIT, 0x3703, 0x1d},
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{OV2722_8BIT, 0x3705, 0x12},
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{OV2722_8BIT, 0x3730, 0x1f},
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{OV2722_8BIT, 0x3704, 0x3f},
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{OV2722_8BIT, 0x3f06, 0x1d},
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{OV2722_8BIT, 0x371c, 0x00},
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{OV2722_8BIT, 0x371d, 0x83},
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{OV2722_8BIT, 0x371e, 0x00},
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{OV2722_8BIT, 0x371f, 0xbd},
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{OV2722_8BIT, 0x3708, 0x63},
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{OV2722_8BIT, 0x3709, 0x52},
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{OV2722_8BIT, 0x3800, 0x00},
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{OV2722_8BIT, 0x3801, 0xf2}, /* H crop start: 322 - 80 = 242*/
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{OV2722_8BIT, 0x3802, 0x00},
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{OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32*/
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{OV2722_8BIT, 0x3804, 0x06},
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{OV2722_8BIT, 0x3805, 0xBB}, /* H crop end: 1643 + 80 = 1723*/
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{OV2722_8BIT, 0x3806, 0x04},
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{OV2722_8BIT, 0x3807, 0x03}, /* V crop end: 1027*/
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{OV2722_8BIT, 0x3808, 0x02},
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{OV2722_8BIT, 0x3809, 0xE0}, /* H output size: 656 +80 = 736*/
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{OV2722_8BIT, 0x380a, 0x01},
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{OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */
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/* H blank timing */
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{OV2722_8BIT, 0x380c, 0x08},
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{OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */
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{OV2722_8BIT, 0x380e, 0x04},
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{OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */
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{OV2722_8BIT, 0x3810, 0x00},
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{OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */
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{OV2722_8BIT, 0x3812, 0x00},
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{OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */
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{OV2722_8BIT, 0x3820, 0x80},
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{OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/
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{OV2722_8BIT, 0x3814, 0x31},
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{OV2722_8BIT, 0x3815, 0x31},
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{OV2722_8BIT, 0x3612, 0x4b},
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{OV2722_8BIT, 0x3618, 0x04},
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{OV2722_8BIT, 0x3a08, 0x02},
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{OV2722_8BIT, 0x3a09, 0x67},
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{OV2722_8BIT, 0x3a0a, 0x02},
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{OV2722_8BIT, 0x3a0b, 0x00},
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{OV2722_8BIT, 0x3a0d, 0x00},
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{OV2722_8BIT, 0x3a0e, 0x00},
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{OV2722_8BIT, 0x4520, 0x0a},
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{OV2722_8BIT, 0x4837, 0x1b},
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{OV2722_8BIT, 0x3000, 0xff},
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{OV2722_8BIT, 0x3001, 0xff},
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{OV2722_8BIT, 0x3002, 0xf0},
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{OV2722_8BIT, 0x3600, 0x08},
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{OV2722_8BIT, 0x3621, 0xc0},
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{OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */
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{OV2722_8BIT, 0x3633, 0x63},
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{OV2722_8BIT, 0x3634, 0x24},
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{OV2722_8BIT, 0x3f01, 0x0c},
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{OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */
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{OV2722_8BIT, 0x3614, 0xf0},
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{OV2722_8BIT, 0x3630, 0x2d},
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{OV2722_8BIT, 0x370b, 0x62},
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{OV2722_8BIT, 0x3706, 0x61},
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{OV2722_8BIT, 0x4000, 0x02},
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{OV2722_8BIT, 0x4002, 0xc5},
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{OV2722_8BIT, 0x4005, 0x08},
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{OV2722_8BIT, 0x404f, 0x84},
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{OV2722_8BIT, 0x4051, 0x00},
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{OV2722_8BIT, 0x5000, 0xff},
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{OV2722_8BIT, 0x3a18, 0x00},
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{OV2722_8BIT, 0x3a19, 0x80},
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{OV2722_8BIT, 0x4521, 0x00},
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{OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */
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{OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */
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{OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */
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{OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */
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{OV2722_8BIT, 0x370c, 0x0c},
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{OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */
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{OV2722_8BIT, 0x3035, 0x00},
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{OV2722_8BIT, 0x3036, 0x26},
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{OV2722_8BIT, 0x3037, 0xa1},
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{OV2722_8BIT, 0x303e, 0x19},
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{OV2722_8BIT, 0x3038, 0x06},
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{OV2722_8BIT, 0x3018, 0x04},
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/* Added for power optimization */
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{OV2722_8BIT, 0x3000, 0x00},
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{OV2722_8BIT, 0x3001, 0x00},
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{OV2722_8BIT, 0x3002, 0x00},
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{OV2722_8BIT, 0x3a0f, 0x40},
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{OV2722_8BIT, 0x3a10, 0x38},
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{OV2722_8BIT, 0x3a1b, 0x48},
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{OV2722_8BIT, 0x3a1e, 0x30},
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{OV2722_8BIT, 0x3a11, 0x90},
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{OV2722_8BIT, 0x3a1f, 0x10},
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{OV2722_8BIT, 0x3011, 0x22},
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{OV2722_8BIT, 0x3a00, 0x58},
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{OV2722_8BIT, 0x3503, 0x17},
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{OV2722_8BIT, 0x3500, 0x00},
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{OV2722_8BIT, 0x3501, 0x46},
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{OV2722_8BIT, 0x3502, 0x00},
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{OV2722_8BIT, 0x3508, 0x00},
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{OV2722_8BIT, 0x3509, 0x10},
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{OV2722_TOK_TERM, 0, 0},
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};
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static const struct ov2722_reg ov2722_VGA_30fps[] = {
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{OV2722_8BIT, 0x3718, 0x10},
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{OV2722_8BIT, 0x3702, 0x18},
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{OV2722_8BIT, 0x373a, 0x3c},
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{OV2722_8BIT, 0x3715, 0x01},
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{OV2722_8BIT, 0x3703, 0x1d},
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{OV2722_8BIT, 0x3705, 0x12},
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{OV2722_8BIT, 0x3730, 0x1f},
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{OV2722_8BIT, 0x3704, 0x3f},
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{OV2722_8BIT, 0x3f06, 0x1d},
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{OV2722_8BIT, 0x371c, 0x00},
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{OV2722_8BIT, 0x371d, 0x83},
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{OV2722_8BIT, 0x371e, 0x00},
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{OV2722_8BIT, 0x371f, 0xbd},
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{OV2722_8BIT, 0x3708, 0x63},
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{OV2722_8BIT, 0x3709, 0x52},
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{OV2722_8BIT, 0x3800, 0x01},
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{OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */
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{OV2722_8BIT, 0x3802, 0x00},
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{OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32*/
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{OV2722_8BIT, 0x3804, 0x06},
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{OV2722_8BIT, 0x3805, 0x6B}, /* H crop end: 1643*/
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{OV2722_8BIT, 0x3806, 0x04},
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{OV2722_8BIT, 0x3807, 0x03}, /* V crop end: 1027*/
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{OV2722_8BIT, 0x3808, 0x02},
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{OV2722_8BIT, 0x3809, 0x90}, /* H output size: 656 */
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{OV2722_8BIT, 0x380a, 0x01},
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{OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */
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/* H blank timing */
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{OV2722_8BIT, 0x380c, 0x08},
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{OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */
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{OV2722_8BIT, 0x380e, 0x04},
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{OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */
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{OV2722_8BIT, 0x3810, 0x00},
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{OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */
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{OV2722_8BIT, 0x3812, 0x00},
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{OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */
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{OV2722_8BIT, 0x3820, 0x80},
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{OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/
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{OV2722_8BIT, 0x3814, 0x31},
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{OV2722_8BIT, 0x3815, 0x31},
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{OV2722_8BIT, 0x3612, 0x4b},
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{OV2722_8BIT, 0x3618, 0x04},
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{OV2722_8BIT, 0x3a08, 0x02},
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{OV2722_8BIT, 0x3a09, 0x67},
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{OV2722_8BIT, 0x3a0a, 0x02},
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{OV2722_8BIT, 0x3a0b, 0x00},
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{OV2722_8BIT, 0x3a0d, 0x00},
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{OV2722_8BIT, 0x3a0e, 0x00},
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{OV2722_8BIT, 0x4520, 0x0a},
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{OV2722_8BIT, 0x4837, 0x29},
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{OV2722_8BIT, 0x3000, 0xff},
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{OV2722_8BIT, 0x3001, 0xff},
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{OV2722_8BIT, 0x3002, 0xf0},
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{OV2722_8BIT, 0x3600, 0x08},
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{OV2722_8BIT, 0x3621, 0xc0},
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{OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */
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{OV2722_8BIT, 0x3633, 0x63},
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{OV2722_8BIT, 0x3634, 0x24},
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{OV2722_8BIT, 0x3f01, 0x0c},
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{OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */
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{OV2722_8BIT, 0x3614, 0xf0},
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{OV2722_8BIT, 0x3630, 0x2d},
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{OV2722_8BIT, 0x370b, 0x62},
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{OV2722_8BIT, 0x3706, 0x61},
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{OV2722_8BIT, 0x4000, 0x02},
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{OV2722_8BIT, 0x4002, 0xc5},
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{OV2722_8BIT, 0x4005, 0x08},
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{OV2722_8BIT, 0x404f, 0x84},
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{OV2722_8BIT, 0x4051, 0x00},
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{OV2722_8BIT, 0x5000, 0xff},
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{OV2722_8BIT, 0x3a18, 0x00},
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{OV2722_8BIT, 0x3a19, 0x80},
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{OV2722_8BIT, 0x4521, 0x00},
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{OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */
|
||||
{OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */
|
||||
{OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */
|
||||
{OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */
|
||||
{OV2722_8BIT, 0x370c, 0x0c},
|
||||
{OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */
|
||||
{OV2722_8BIT, 0x3035, 0x00},
|
||||
{OV2722_8BIT, 0x3036, 0x26},
|
||||
{OV2722_8BIT, 0x3037, 0xa1},
|
||||
{OV2722_8BIT, 0x303e, 0x19},
|
||||
{OV2722_8BIT, 0x3038, 0x06},
|
||||
{OV2722_8BIT, 0x3018, 0x04},
|
||||
|
||||
/* Added for power optimization */
|
||||
{OV2722_8BIT, 0x3000, 0x00},
|
||||
{OV2722_8BIT, 0x3001, 0x00},
|
||||
{OV2722_8BIT, 0x3002, 0x00},
|
||||
{OV2722_8BIT, 0x3a0f, 0x40},
|
||||
{OV2722_8BIT, 0x3a10, 0x38},
|
||||
{OV2722_8BIT, 0x3a1b, 0x48},
|
||||
{OV2722_8BIT, 0x3a1e, 0x30},
|
||||
{OV2722_8BIT, 0x3a11, 0x90},
|
||||
{OV2722_8BIT, 0x3a1f, 0x10},
|
||||
{OV2722_8BIT, 0x3011, 0x22},
|
||||
{OV2722_8BIT, 0x3a00, 0x58},
|
||||
{OV2722_8BIT, 0x3503, 0x17},
|
||||
{OV2722_8BIT, 0x3500, 0x00},
|
||||
{OV2722_8BIT, 0x3501, 0x46},
|
||||
{OV2722_8BIT, 0x3502, 0x00},
|
||||
{OV2722_8BIT, 0x3508, 0x00},
|
||||
{OV2722_8BIT, 0x3509, 0x10},
|
||||
{OV2722_TOK_TERM, 0, 0},
|
||||
};
|
||||
#endif
|
||||
|
||||
static const struct ov2722_reg ov2722_1632_1092_30fps[] = {
|
||||
/* For stand wait for a whole frame complete.(vblank) */
|
||||
{OV2722_8BIT, 0x3021, 0x03},
|
||||
|
|
@ -768,115 +435,6 @@ static const struct ov2722_reg ov2722_1452_1092_30fps[] = {
|
|||
{OV2722_TOK_TERM, 0, 0}
|
||||
};
|
||||
|
||||
#if 0
|
||||
static const struct ov2722_reg ov2722_1M3_30fps[] = {
|
||||
{OV2722_8BIT, 0x3718, 0x10},
|
||||
{OV2722_8BIT, 0x3702, 0x24},
|
||||
{OV2722_8BIT, 0x373a, 0x60},
|
||||
{OV2722_8BIT, 0x3715, 0x01},
|
||||
{OV2722_8BIT, 0x3703, 0x2e},
|
||||
{OV2722_8BIT, 0x3705, 0x10},
|
||||
{OV2722_8BIT, 0x3730, 0x30},
|
||||
{OV2722_8BIT, 0x3704, 0x62},
|
||||
{OV2722_8BIT, 0x3f06, 0x3a},
|
||||
{OV2722_8BIT, 0x371c, 0x00},
|
||||
{OV2722_8BIT, 0x371d, 0xc4},
|
||||
{OV2722_8BIT, 0x371e, 0x01},
|
||||
{OV2722_8BIT, 0x371f, 0x0d},
|
||||
{OV2722_8BIT, 0x3708, 0x61},
|
||||
{OV2722_8BIT, 0x3709, 0x12},
|
||||
{OV2722_8BIT, 0x3800, 0x01},
|
||||
{OV2722_8BIT, 0x3801, 0x4a}, /* H crop start: 330 */
|
||||
{OV2722_8BIT, 0x3802, 0x00},
|
||||
{OV2722_8BIT, 0x3803, 0x03}, /* V crop start: 3 */
|
||||
{OV2722_8BIT, 0x3804, 0x06},
|
||||
{OV2722_8BIT, 0x3805, 0xe1}, /* H crop end: 1761 */
|
||||
{OV2722_8BIT, 0x3806, 0x04},
|
||||
{OV2722_8BIT, 0x3807, 0x47}, /* V crop end: 1095 */
|
||||
{OV2722_8BIT, 0x3808, 0x05},
|
||||
{OV2722_8BIT, 0x3809, 0x88}, /* H output size: 1416 */
|
||||
{OV2722_8BIT, 0x380a, 0x04},
|
||||
{OV2722_8BIT, 0x380b, 0x0a}, /* V output size: 1034 */
|
||||
|
||||
/* H blank timing */
|
||||
{OV2722_8BIT, 0x380c, 0x08},
|
||||
{OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */
|
||||
{OV2722_8BIT, 0x380e, 0x04},
|
||||
{OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */
|
||||
{OV2722_8BIT, 0x3810, 0x00},
|
||||
{OV2722_8BIT, 0x3811, 0x05}, /* H window offset: 5 */
|
||||
{OV2722_8BIT, 0x3812, 0x00},
|
||||
{OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */
|
||||
{OV2722_8BIT, 0x3820, 0x80},
|
||||
{OV2722_8BIT, 0x3821, 0x06}, /* flip isp */
|
||||
{OV2722_8BIT, 0x3814, 0x11},
|
||||
{OV2722_8BIT, 0x3815, 0x11},
|
||||
{OV2722_8BIT, 0x3612, 0x0b},
|
||||
{OV2722_8BIT, 0x3618, 0x04},
|
||||
{OV2722_8BIT, 0x3a08, 0x01},
|
||||
{OV2722_8BIT, 0x3a09, 0x50},
|
||||
{OV2722_8BIT, 0x3a0a, 0x01},
|
||||
{OV2722_8BIT, 0x3a0b, 0x18},
|
||||
{OV2722_8BIT, 0x3a0d, 0x03},
|
||||
{OV2722_8BIT, 0x3a0e, 0x03},
|
||||
{OV2722_8BIT, 0x4520, 0x00},
|
||||
{OV2722_8BIT, 0x4837, 0x1b},
|
||||
{OV2722_8BIT, 0x3000, 0xff},
|
||||
{OV2722_8BIT, 0x3001, 0xff},
|
||||
{OV2722_8BIT, 0x3002, 0xf0},
|
||||
{OV2722_8BIT, 0x3600, 0x08},
|
||||
{OV2722_8BIT, 0x3621, 0xc0},
|
||||
{OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */
|
||||
{OV2722_8BIT, 0x3633, 0x23},
|
||||
{OV2722_8BIT, 0x3634, 0x54},
|
||||
{OV2722_8BIT, 0x3f01, 0x0c},
|
||||
{OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */
|
||||
{OV2722_8BIT, 0x3614, 0xf0},
|
||||
{OV2722_8BIT, 0x3630, 0x2d},
|
||||
{OV2722_8BIT, 0x370b, 0x62},
|
||||
{OV2722_8BIT, 0x3706, 0x61},
|
||||
{OV2722_8BIT, 0x4000, 0x02},
|
||||
{OV2722_8BIT, 0x4002, 0xc5},
|
||||
{OV2722_8BIT, 0x4005, 0x08},
|
||||
{OV2722_8BIT, 0x404f, 0x84},
|
||||
{OV2722_8BIT, 0x4051, 0x00},
|
||||
{OV2722_8BIT, 0x5000, 0xcf},
|
||||
{OV2722_8BIT, 0x3a18, 0x00},
|
||||
{OV2722_8BIT, 0x3a19, 0x80},
|
||||
{OV2722_8BIT, 0x4521, 0x00},
|
||||
{OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */
|
||||
{OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */
|
||||
{OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */
|
||||
{OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */
|
||||
{OV2722_8BIT, 0x370c, 0x0c},
|
||||
{OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */
|
||||
{OV2722_8BIT, 0x3035, 0x00},
|
||||
{OV2722_8BIT, 0x3036, 0x26},
|
||||
{OV2722_8BIT, 0x3037, 0xa1},
|
||||
{OV2722_8BIT, 0x303e, 0x19},
|
||||
{OV2722_8BIT, 0x3038, 0x06},
|
||||
{OV2722_8BIT, 0x3018, 0x04},
|
||||
|
||||
/* Added for power optimization */
|
||||
{OV2722_8BIT, 0x3000, 0x00},
|
||||
{OV2722_8BIT, 0x3001, 0x00},
|
||||
{OV2722_8BIT, 0x3002, 0x00},
|
||||
{OV2722_8BIT, 0x3a0f, 0x40},
|
||||
{OV2722_8BIT, 0x3a10, 0x38},
|
||||
{OV2722_8BIT, 0x3a1b, 0x48},
|
||||
{OV2722_8BIT, 0x3a1e, 0x30},
|
||||
{OV2722_8BIT, 0x3a11, 0x90},
|
||||
{OV2722_8BIT, 0x3a1f, 0x10},
|
||||
{OV2722_8BIT, 0x3503, 0x17},
|
||||
{OV2722_8BIT, 0x3500, 0x00},
|
||||
{OV2722_8BIT, 0x3501, 0x46},
|
||||
{OV2722_8BIT, 0x3502, 0x00},
|
||||
{OV2722_8BIT, 0x3508, 0x00},
|
||||
{OV2722_8BIT, 0x3509, 0x10},
|
||||
{OV2722_TOK_TERM, 0, 0},
|
||||
};
|
||||
#endif
|
||||
|
||||
static const struct ov2722_reg ov2722_1080p_30fps[] = {
|
||||
/* For stand wait for a whole frame complete.(vblank) */
|
||||
{OV2722_8BIT, 0x3021, 0x03},
|
||||
|
|
@ -982,108 +540,6 @@ static const struct ov2722_reg ov2722_1080p_30fps[] = {
|
|||
{OV2722_TOK_TERM, 0, 0}
|
||||
};
|
||||
|
||||
#if 0 /* Currently unused */
|
||||
static const struct ov2722_reg ov2722_720p_30fps[] = {
|
||||
{OV2722_8BIT, 0x3021, 0x03},
|
||||
{OV2722_8BIT, 0x3718, 0x10},
|
||||
{OV2722_8BIT, 0x3702, 0x24},
|
||||
{OV2722_8BIT, 0x373a, 0x60},
|
||||
{OV2722_8BIT, 0x3715, 0x01},
|
||||
{OV2722_8BIT, 0x3703, 0x2e},
|
||||
{OV2722_8BIT, 0x3705, 0x10},
|
||||
{OV2722_8BIT, 0x3730, 0x30},
|
||||
{OV2722_8BIT, 0x3704, 0x62},
|
||||
{OV2722_8BIT, 0x3f06, 0x3a},
|
||||
{OV2722_8BIT, 0x371c, 0x00},
|
||||
{OV2722_8BIT, 0x371d, 0xc4},
|
||||
{OV2722_8BIT, 0x371e, 0x01},
|
||||
{OV2722_8BIT, 0x371f, 0x0d},
|
||||
{OV2722_8BIT, 0x3708, 0x61},
|
||||
{OV2722_8BIT, 0x3709, 0x12},
|
||||
{OV2722_8BIT, 0x3800, 0x01},
|
||||
{OV2722_8BIT, 0x3801, 0x40}, /* H crop start: 320 */
|
||||
{OV2722_8BIT, 0x3802, 0x00},
|
||||
{OV2722_8BIT, 0x3803, 0xb1}, /* V crop start: 177 */
|
||||
{OV2722_8BIT, 0x3804, 0x06},
|
||||
{OV2722_8BIT, 0x3805, 0x55}, /* H crop end: 1621 */
|
||||
{OV2722_8BIT, 0x3806, 0x03},
|
||||
{OV2722_8BIT, 0x3807, 0x95}, /* V crop end: 918 */
|
||||
{OV2722_8BIT, 0x3808, 0x05},
|
||||
{OV2722_8BIT, 0x3809, 0x10}, /* H output size: 0x0788==1928 */
|
||||
{OV2722_8BIT, 0x380a, 0x02},
|
||||
{OV2722_8BIT, 0x380b, 0xe0}, /* output size: 0x02DE==734 */
|
||||
{OV2722_8BIT, 0x380c, 0x08},
|
||||
{OV2722_8BIT, 0x380d, 0x00}, /* H timing: 2048 */
|
||||
{OV2722_8BIT, 0x380e, 0x04},
|
||||
{OV2722_8BIT, 0x380f, 0xa3}, /* V timing: 1187 */
|
||||
{OV2722_8BIT, 0x3810, 0x00},
|
||||
{OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */
|
||||
{OV2722_8BIT, 0x3812, 0x00},
|
||||
{OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */
|
||||
{OV2722_8BIT, 0x3820, 0x80},
|
||||
{OV2722_8BIT, 0x3821, 0x06}, /* mirror */
|
||||
{OV2722_8BIT, 0x3814, 0x11},
|
||||
{OV2722_8BIT, 0x3815, 0x11},
|
||||
{OV2722_8BIT, 0x3612, 0x0b},
|
||||
{OV2722_8BIT, 0x3618, 0x04},
|
||||
{OV2722_8BIT, 0x3a08, 0x01},
|
||||
{OV2722_8BIT, 0x3a09, 0x50},
|
||||
{OV2722_8BIT, 0x3a0a, 0x01},
|
||||
{OV2722_8BIT, 0x3a0b, 0x18},
|
||||
{OV2722_8BIT, 0x3a0d, 0x03},
|
||||
{OV2722_8BIT, 0x3a0e, 0x03},
|
||||
{OV2722_8BIT, 0x4520, 0x00},
|
||||
{OV2722_8BIT, 0x4837, 0x1b},
|
||||
{OV2722_8BIT, 0x3600, 0x08},
|
||||
{OV2722_8BIT, 0x3621, 0xc0},
|
||||
{OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */
|
||||
{OV2722_8BIT, 0x3633, 0x23},
|
||||
{OV2722_8BIT, 0x3634, 0x54},
|
||||
{OV2722_8BIT, 0x3f01, 0x0c},
|
||||
{OV2722_8BIT, 0x5001, 0xc1},
|
||||
{OV2722_8BIT, 0x3614, 0xf0},
|
||||
{OV2722_8BIT, 0x3630, 0x2d},
|
||||
{OV2722_8BIT, 0x370b, 0x62},
|
||||
{OV2722_8BIT, 0x3706, 0x61},
|
||||
{OV2722_8BIT, 0x4000, 0x02},
|
||||
{OV2722_8BIT, 0x4002, 0xc5},
|
||||
{OV2722_8BIT, 0x4005, 0x08},
|
||||
{OV2722_8BIT, 0x404f, 0x84},
|
||||
{OV2722_8BIT, 0x4051, 0x00},
|
||||
{OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */
|
||||
{OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */
|
||||
{OV2722_8BIT, 0x3a18, 0x00},
|
||||
{OV2722_8BIT, 0x3a19, 0x80},
|
||||
{OV2722_8BIT, 0x4521, 0x00},
|
||||
{OV2722_8BIT, 0x5183, 0xb0},
|
||||
{OV2722_8BIT, 0x5184, 0xb0},
|
||||
{OV2722_8BIT, 0x5185, 0xb0},
|
||||
{OV2722_8BIT, 0x370c, 0x0c},
|
||||
{OV2722_8BIT, 0x3035, 0x00},
|
||||
{OV2722_8BIT, 0x3036, 0x26}, /* {0x3036, 0x2c}, //422.4 MHz */
|
||||
{OV2722_8BIT, 0x3037, 0xa1},
|
||||
{OV2722_8BIT, 0x303e, 0x19},
|
||||
{OV2722_8BIT, 0x3038, 0x06},
|
||||
{OV2722_8BIT, 0x3018, 0x04},
|
||||
{OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */
|
||||
{OV2722_8BIT, 0x3001, 0x00},
|
||||
{OV2722_8BIT, 0x3002, 0x00},
|
||||
{OV2722_8BIT, 0x3a0f, 0x40},
|
||||
{OV2722_8BIT, 0x3a10, 0x38},
|
||||
{OV2722_8BIT, 0x3a1b, 0x48},
|
||||
{OV2722_8BIT, 0x3a1e, 0x30},
|
||||
{OV2722_8BIT, 0x3a11, 0x90},
|
||||
{OV2722_8BIT, 0x3a1f, 0x10},
|
||||
{OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */
|
||||
{OV2722_8BIT, 0x3500, 0x00},
|
||||
{OV2722_8BIT, 0x3501, 0x3F},
|
||||
{OV2722_8BIT, 0x3502, 0x00},
|
||||
{OV2722_8BIT, 0x3508, 0x00},
|
||||
{OV2722_8BIT, 0x3509, 0x00},
|
||||
{OV2722_TOK_TERM, 0, 0},
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct ov2722_resolution ov2722_res_preview[] = {
|
||||
{
|
||||
.desc = "ov2722_1632_1092_30fps",
|
||||
|
|
@ -1128,99 +584,6 @@ static struct ov2722_resolution ov2722_res_preview[] = {
|
|||
|
||||
#define N_RES_PREVIEW (ARRAY_SIZE(ov2722_res_preview))
|
||||
|
||||
/*
|
||||
* Disable non-preview configurations until the configuration selection is
|
||||
* improved.
|
||||
*/
|
||||
#if 0
|
||||
struct ov2722_resolution ov2722_res_still[] = {
|
||||
{
|
||||
.desc = "ov2722_480P_30fps",
|
||||
.width = 1632,
|
||||
.height = 1092,
|
||||
.fps = 30,
|
||||
.pix_clk_freq = 85,
|
||||
.used = 0,
|
||||
.pixels_per_line = 2260,
|
||||
.lines_per_frame = 1244,
|
||||
.skip_frames = 3,
|
||||
.regs = ov2722_1632_1092_30fps,
|
||||
.mipi_freq = 422400,
|
||||
},
|
||||
{
|
||||
.desc = "ov2722_1452_1092_30fps",
|
||||
.width = 1452,
|
||||
.height = 1092,
|
||||
.fps = 30,
|
||||
.pix_clk_freq = 85,
|
||||
.used = 0,
|
||||
.pixels_per_line = 2260,
|
||||
.lines_per_frame = 1244,
|
||||
.skip_frames = 3,
|
||||
.regs = ov2722_1452_1092_30fps,
|
||||
.mipi_freq = 422400,
|
||||
},
|
||||
{
|
||||
.desc = "ov2722_1080P_30fps",
|
||||
.width = 1932,
|
||||
.height = 1092,
|
||||
.pix_clk_freq = 69,
|
||||
.fps = 30,
|
||||
.used = 0,
|
||||
.pixels_per_line = 2068,
|
||||
.lines_per_frame = 1114,
|
||||
.skip_frames = 3,
|
||||
.regs = ov2722_1080p_30fps,
|
||||
.mipi_freq = 345600,
|
||||
},
|
||||
};
|
||||
|
||||
#define N_RES_STILL (ARRAY_SIZE(ov2722_res_still))
|
||||
|
||||
struct ov2722_resolution ov2722_res_video[] = {
|
||||
{
|
||||
.desc = "ov2722_QVGA_30fps",
|
||||
.width = 336,
|
||||
.height = 256,
|
||||
.fps = 30,
|
||||
.pix_clk_freq = 73,
|
||||
.used = 0,
|
||||
.pixels_per_line = 2048,
|
||||
.lines_per_frame = 1184,
|
||||
.skip_frames = 3,
|
||||
.regs = ov2722_QVGA_30fps,
|
||||
.mipi_freq = 364800,
|
||||
},
|
||||
{
|
||||
.desc = "ov2722_480P_30fps",
|
||||
.width = 736,
|
||||
.height = 496,
|
||||
.fps = 30,
|
||||
.pix_clk_freq = 73,
|
||||
.used = 0,
|
||||
.pixels_per_line = 2048,
|
||||
.lines_per_frame = 1184,
|
||||
.skip_frames = 3,
|
||||
.regs = ov2722_480P_30fps,
|
||||
},
|
||||
{
|
||||
.desc = "ov2722_1080P_30fps",
|
||||
.width = 1932,
|
||||
.height = 1092,
|
||||
.pix_clk_freq = 69,
|
||||
.fps = 30,
|
||||
.used = 0,
|
||||
.pixels_per_line = 2068,
|
||||
.lines_per_frame = 1114,
|
||||
.skip_frames = 3,
|
||||
.regs = ov2722_1080p_30fps,
|
||||
.mipi_freq = 345600,
|
||||
},
|
||||
};
|
||||
|
||||
#define N_RES_VIDEO (ARRAY_SIZE(ov2722_res_video))
|
||||
#endif
|
||||
|
||||
static struct ov2722_resolution *ov2722_res = ov2722_res_preview;
|
||||
static unsigned long N_RES = N_RES_PREVIEW;
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user