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Renesas DTS updates for v6.10

Browse Source 
- Add HDMI capture support for the Function expansion board for the
     Eagle development board,
   - Add PMIC support for the RZ/G2UL SMARC EVK development board,
   - Add thermal, more serial ((H)SCIF), and timer (CMT and TMU) support
     for the R-Car V4M SoC,
   - Add Timer Unit (TMU) support for the R-Mobile APE6, R-Car Gen2, and
     RZ/G1 SoCs,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-dts-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.10

  - Add HDMI capture support for the Function expansion board for the
    Eagle development board,
  - Add PMIC support for the RZ/G2UL SMARC EVK development board,
  - Add thermal, more serial ((H)SCIF), and timer (CMT and TMU) support
    for the R-Car V4M SoC,
  - Add Timer Unit (TMU) support for the R-Mobile APE6, R-Car Gen2, and
    RZ/G1 SoCs,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: rzg3s-smarc-som: Fix Ethernet aliases
  arm64: dts: renesas: r8a779h0: Add TMU nodes
  arm64: dts: renesas: r8a779h0: Add CMT nodes
  arm64: dts: renesas: gray-hawk-single: Enable nfsroot
  ARM: dts: renesas: r9a06g032: Remove duplicate interrupt-parent
  arm64: dts: renesas: gray-hawk-single: Add second debug serial port
  arm64: dts: renesas: r8a779h0: Add SCIF nodes
  arm64: dts: renesas: r8a779h0: Add remaining HSCIF nodes
  ARM: dts: renesas: rcar-gen2: Add TMU nodes
  ARM: dts: renesas: rzg1: Add TMU nodes
  ARM: dts: renesas: r8a73a4: Add TMU nodes
  ARM: dts: renesas: r7s72100: Add interrupt-names to SCIF nodes
  arm64: dts: renesas: r8a779h0: Add thermal nodes
  arm64: dts: renesas: rzg2ul-smarc: Enable PMIC and built-in RTC, GPIO and ONKEY
  arm64: dts: renesas: eagle: Add capture overlay for Function expansion board

Link: https://lore.kernel.org/r/cover.1712915536.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2024-04-29 10:21:59 +02:00
commit f45083c343
20 changed files with 1228 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/boot/dts/renesas/r7s72100.dtsi
View File

@ -125,6 +125,7 @@ scif0: serial@e8007000 {
<GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "bri";
clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
clock-names = "fck";
power-domains = <&cpg_clocks>;
@ -138,6 +139,7 @@ scif1: serial@e8007800 {
<GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "bri";
clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
clock-names = "fck";
power-domains = <&cpg_clocks>;
@ -151,6 +153,7 @@ scif2: serial@e8008000 {
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "bri";
clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
clock-names = "fck";
power-domains = <&cpg_clocks>;
@ -164,6 +167,7 @@ scif3: serial@e8008800 {
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "bri";
clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
clock-names = "fck";
power-domains = <&cpg_clocks>;
@ -177,6 +181,7 @@ scif4: serial@e8009000 {
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "bri";
clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
clock-names = "fck";
power-domains = <&cpg_clocks>;
@ -190,6 +195,7 @@ scif5: serial@e8009800 {
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "bri";
clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
clock-names = "fck";
power-domains = <&cpg_clocks>;
@ -203,6 +209,7 @@ scif6: serial@e800a000 {
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "bri";
clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
clock-names = "fck";
power-domains = <&cpg_clocks>;
@ -216,6 +223,7 @@ scif7: serial@e800a800 {
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "bri";
clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
clock-names = "fck";
power-domains = <&cpg_clocks>;

37
arch/arm/boot/dts/renesas/r8a73a4.dtsi
View File

@ -60,6 +60,32 @@ timer {
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a73a4", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&mstp1_clks R8A73A4_CLK_TMU0>;
clock-names = "fck";
power-domains = <&pd_c5>;
status = "disabled";
};
tmu3: timer@fff80000 {
compatible = "renesas,tmu-r8a73a4", "renesas,tmu";
reg = <0 0xfff80000 0 0x30>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&mstp1_clks R8A73A4_CLK_TMU3>;
clock-names = "fck";
power-domains = <&pd_a3r>;
status = "disabled";
};
dbsc1: memory-controller@e6790000 {
compatible = "renesas,dbsc-r8a73a4";
reg = <0 0xe6790000 0 0x10000>;
@ -654,6 +680,17 @@ extal1_div2_clk: extal1_div2 {
};
/* Gate clocks */
mstp1_clks: mstp1_clks@e6150134 {
compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
clocks = <&cp_clk>, <&mp_clk>;
#clock-cells = <1>;
clock-indices = <
R8A73A4_CLK_TMU0 R8A73A4_CLK_TMU3
>;
clock-output-names =
"tmu0", "tmu3";
};
mstp2_clks: mstp2_clks@e6150138 {
compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;

58
arch/arm/boot/dts/renesas/r8a7742.dtsi
View File

@ -404,6 +404,64 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a7742", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 125>;
clock-names = "fck";
power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
resets = <&cpg 125>;
status = "disabled";
};
tmu1: timer@fff60000 {
compatible = "renesas,tmu-r8a7742", "renesas,tmu";
reg = <0 0xfff60000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 111>;
clock-names = "fck";
power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
resets = <&cpg 111>;
status = "disabled";
};
tmu2: timer@fff70000 {
compatible = "renesas,tmu-r8a7742", "renesas,tmu";
reg = <0 0xfff70000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
resets = <&cpg 122>;
status = "disabled";
};
tmu3: timer@fff80000 {
compatible = "renesas,tmu-r8a7742", "renesas,tmu";
reg = <0 0xfff80000 0 0x30>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
resets = <&cpg 121>;
status = "disabled";
};
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7742",
"renesas,rcar-gen2-thermal";

58
arch/arm/boot/dts/renesas/r8a7743.dtsi
View File

@ -329,6 +329,64 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a7743", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 125>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 125>;
status = "disabled";
};
tmu1: timer@fff60000 {
compatible = "renesas,tmu-r8a7743", "renesas,tmu";
reg = <0 0xfff60000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 111>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 111>;
status = "disabled";
};
tmu2: timer@fff70000 {
compatible = "renesas,tmu-r8a7743", "renesas,tmu";
reg = <0 0xfff70000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 122>;
status = "disabled";
};
tmu3: timer@fff80000 {
compatible = "renesas,tmu-r8a7743", "renesas,tmu";
reg = <0 0xfff80000 0 0x30>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 121>;
status = "disabled";
};
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7743",
"renesas,rcar-gen2-thermal";

58
arch/arm/boot/dts/renesas/r8a7744.dtsi
View File

@ -329,6 +329,64 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a7744", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 125>;
clock-names = "fck";
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 125>;
status = "disabled";
};
tmu1: timer@fff60000 {
compatible = "renesas,tmu-r8a7744", "renesas,tmu";
reg = <0 0xfff60000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 111>;
clock-names = "fck";
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 111>;
status = "disabled";
};
tmu2: timer@fff70000 {
compatible = "renesas,tmu-r8a7744", "renesas,tmu";
reg = <0 0xfff70000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 122>;
status = "disabled";
};
tmu3: timer@fff80000 {
compatible = "renesas,tmu-r8a7744", "renesas,tmu";
reg = <0 0xfff80000 0 0x30>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 121>;
status = "disabled";
};
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7744",
"renesas,rcar-gen2-thermal";

58
arch/arm/boot/dts/renesas/r8a7745.dtsi
View File

@ -304,6 +304,64 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a7745", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 125>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 125>;
status = "disabled";
};
tmu1: timer@fff60000 {
compatible = "renesas,tmu-r8a7745", "renesas,tmu";
reg = <0 0xfff60000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 111>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 111>;
status = "disabled";
};
tmu2: timer@fff70000 {
compatible = "renesas,tmu-r8a7745", "renesas,tmu";
reg = <0 0xfff70000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 122>;
status = "disabled";
};
tmu3: timer@fff80000 {
compatible = "renesas,tmu-r8a7745", "renesas,tmu";
reg = <0 0xfff80000 0 0x30>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 121>;
status = "disabled";
};
ipmmu_sy0: iommu@e6280000 {
compatible = "renesas,ipmmu-r8a7745",
"renesas,ipmmu-vmsa";

44
arch/arm/boot/dts/renesas/r8a77470.dtsi
View File

@ -241,6 +241,50 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
tmu1: timer@fff60000 {
compatible = "renesas,tmu-r8a77470", "renesas,tmu";
reg = <0 0xfff60000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 111>;
clock-names = "fck";
power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
resets = <&cpg 111>;
status = "disabled";
};
tmu2: timer@fff70000 {
compatible = "renesas,tmu-r8a77470", "renesas,tmu";
reg = <0 0xfff70000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
resets = <&cpg 122>;
status = "disabled";
};
tmu3: timer@fff80000 {
compatible = "renesas,tmu-r8a77470", "renesas,tmu";
reg = <0 0xfff80000 0 0x30>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
resets = <&cpg 121>;
status = "disabled";
};
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;

58
arch/arm/boot/dts/renesas/r8a7790.dtsi
View File

@ -434,6 +434,64 @@ irqc0: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a7790", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 125>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 125>;
status = "disabled";
};
tmu1: timer@fff60000 {
compatible = "renesas,tmu-r8a7790", "renesas,tmu";
reg = <0 0xfff60000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 111>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 111>;
status = "disabled";
};
tmu2: timer@fff70000 {
compatible = "renesas,tmu-r8a7790", "renesas,tmu";
reg = <0 0xfff70000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 122>;
status = "disabled";
};
tmu3: timer@fff80000 {
compatible = "renesas,tmu-r8a7790", "renesas,tmu";
reg = <0 0xfff80000 0 0x30>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 121>;
status = "disabled";
};
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7790",
"renesas,rcar-gen2-thermal",

58
arch/arm/boot/dts/renesas/r8a7791.dtsi
View File

@ -351,6 +351,64 @@ irqc0: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a7791", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 125>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 125>;
status = "disabled";
};
tmu1: timer@fff60000 {
compatible = "renesas,tmu-r8a7791", "renesas,tmu";
reg = <0 0xfff60000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 111>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 111>;
status = "disabled";
};
tmu2: timer@fff70000 {
compatible = "renesas,tmu-r8a7791", "renesas,tmu";
reg = <0 0xfff70000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 122>;
status = "disabled";
};
tmu3: timer@fff80000 {
compatible = "renesas,tmu-r8a7791", "renesas,tmu";
reg = <0 0xfff80000 0 0x30>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 121>;
status = "disabled";
};
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7791",
"renesas,rcar-gen2-thermal",

59
arch/arm/boot/dts/renesas/r8a7792.dtsi
View File

@ -351,6 +351,65 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a7792", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 125>;
clock-names = "fck";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 125>;
status = "disabled";
};
tmu1: timer@fff60000 {
compatible = "renesas,tmu-r8a7792", "renesas,tmu";
reg = <0 0xfff60000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 111>;
clock-names = "fck";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 111>;
status = "disabled";
};
tmu2: timer@fff70000 {
compatible = "renesas,tmu-r8a7792", "renesas,tmu";
reg = <0 0xfff70000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 122>;
status = "disabled";
};
tmu3: timer@fff80000 {
compatible = "renesas,tmu-r8a7792", "renesas,tmu";
reg = <0 0xfff80000 0 0x30>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 121>;
status = "disabled";
};
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;

58
arch/arm/boot/dts/renesas/r8a7793.dtsi
View File

@ -326,6 +326,64 @@ irqc0: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a7793", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 125>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 125>;
status = "disabled";
};
tmu1: timer@fff60000 {
compatible = "renesas,tmu-r8a7793", "renesas,tmu";
reg = <0 0xfff60000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 111>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 111>;
status = "disabled";
};
tmu2: timer@fff70000 {
compatible = "renesas,tmu-r8a7793", "renesas,tmu";
reg = <0 0xfff70000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 122>;
status = "disabled";
};
tmu3: timer@fff80000 {
compatible = "renesas,tmu-r8a7793", "renesas,tmu";
reg = <0 0xfff80000 0 0x30>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 121>;
status = "disabled";
};
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7793",
"renesas,rcar-gen2-thermal",

58
arch/arm/boot/dts/renesas/r8a7794.dtsi
View File

@ -292,6 +292,64 @@ irqc0: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a7794", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 125>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 125>;
status = "disabled";
};
tmu1: timer@fff60000 {
compatible = "renesas,tmu-r8a7794", "renesas,tmu";
reg = <0 0xfff60000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 111>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 111>;
status = "disabled";
};
tmu2: timer@fff70000 {
compatible = "renesas,tmu-r8a7794", "renesas,tmu";
reg = <0 0xfff70000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 122>;
status = "disabled";
};
tmu3: timer@fff80000 {
compatible = "renesas,tmu-r8a7794", "renesas,tmu";
reg = <0 0xfff80000 0 0x30>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 121>;
status = "disabled";
};
ipmmu_sy0: iommu@e6280000 {
compatible = "renesas,ipmmu-r8a7794",
"renesas,ipmmu-vmsa";

1
arch/arm/boot/dts/renesas/r9a06g032.dtsi
View File

@ -319,7 +319,6 @@ dma1: dma-controller@40105000 {
gmac2: ethernet@44002000 {
compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
reg = <0x44002000 0x2000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;

3
arch/arm64/boot/dts/renesas/Makefile
View File

@ -62,6 +62,9 @@ dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-ulcb.dtb
dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-ulcb-kf.dtb
dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb
dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle-function-expansion.dtbo
r8a77970-eagle-function-expansion-dtbs := r8a77970-eagle.dtb r8a77970-eagle-function-expansion.dtbo
dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle-function-expansion.dtb
dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-v3msk.dtb
dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb

214
arch/arm64/boot/dts/renesas/r8a77970-eagle-function-expansion.dtso Normal file
View File

@ -0,0 +1,214 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Eagle V3M Function expansion board.
*
* Copyright (C) 2024 Niklas Söderlund <niklas.soderlund@ragnatech.se>
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
/* CN4 */
/* Eagle: SW18 set to OFF */
cvbs-in-cn4 {
compatible = "composite-video-connector";
label = "CVBS IN CN4";
port {
cvbs_con: endpoint {
remote-endpoint = <&adv7482_ain7>;
};
};
};
/* CN2 */
/* Eagle: SW35 set 5, 6 and 8 to OFF */
hdmi-in-cn2 {
compatible = "hdmi-connector";
label = "HDMI IN CN2";
type = "a";
port {
hdmi_in_con2: endpoint {
remote-endpoint = <&adv7612_in>;
};
};
};
/* CN3 */
/* Eagle: SW18 set to OFF */
hdmi-in-cn3 {
compatible = "hdmi-connector";
label = "HDMI IN CN3";
type = "a";
port {
hdmi_in_con: endpoint {
remote-endpoint = <&adv7482_hdmi>;
};
};
};
};
/* Disconnect MAX9286 GMSL I2C. */
&i2c3 {
status = "disabled";
};
/* Connect expansion board I2C. */
&i2c0 {
#address-cells = <1>;
#size-cells = <0>;
gpio@27 {
compatible = "onnn,pca9654";
reg = <0x27>;
gpio-controller;
#gpio-cells = <2>;
vin0_adv7612_en {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-high;
line-name = "VIN0_ADV7612_ENn";
};
};
hdmi-decoder@4c {
compatible = "adi,adv7612";
reg = <0x4c>, <0x50>, <0x52>, <0x54>, <0x56>, <0x58>;
reg-names = "main", "afe", "rep", "edid", "hdmi", "cp";
interrupt-parent = <&gpio3>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
default-input = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7612_in: endpoint {
remote-endpoint = <&hdmi_in_con2>;
};
};
port@2 {
reg = <2>;
adv7612_out: endpoint {
remote-endpoint = <&vin0_in>;
};
};
};
};
video-receiver@70 {
compatible = "adi,adv7482";
reg = <0x70 0x71 0x72 0x73 0x74 0x75
0x60 0x61 0x62 0x63 0x64 0x65>;
reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
"infoframe", "cbus", "cec", "sdp", "txa", "txb" ;
interrupt-parent = <&gpio3>;
interrupts = <03 IRQ_TYPE_LEVEL_LOW>, <04 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "intrq1", "intrq2";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@7 {
reg = <7>;
adv7482_ain7: endpoint {
remote-endpoint = <&cvbs_con>;
};
};
port@8 {
reg = <8>;
adv7482_hdmi: endpoint {
remote-endpoint = <&hdmi_in_con>;
};
};
port@a {
reg = <10>;
adv7482_txa: endpoint {
clock-lanes = <0>;
data-lanes = <1 2 3 4>;
remote-endpoint = <&csi40_in>;
};
};
};
};
};
&csi40 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
csi40_in: endpoint {
clock-lanes = <0>;
data-lanes = <1 2 3 4>;
remote-endpoint = <&adv7482_txa>;
};
};
};
};
&pfc {
vin0_pins_parallel: vin0 {
groups = "vin0_data12", "vin0_sync", "vin0_clk", "vin0_clkenb";
function = "vin0";
};
};
&vin0 {
status = "okay";
pinctrl-0 = <&vin0_pins_parallel>;
pinctrl-names = "default";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vin0_in: endpoint {
pclk-sample = <0>;
hsync-active = <0>;
vsync-active = <0>;
remote-endpoint = <&adv7612_out>;
};
};
};
};
&vin1 {
status = "okay";
};
&vin2 {
status = "okay";
};
&vin3 {
status = "okay";
};

27
arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts
View File

@ -18,11 +18,12 @@ / {
aliases {
serial0 = &hscif0;
serial1 = &hscif2;
ethernet0 = &avb0;
};
chosen {
bootargs = "ignore_loglevel";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:921600n8";
};
@ -90,6 +91,14 @@ &hscif0 {
status = "okay";
};
&hscif2 {
pinctrl-0 = <&hscif2_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
};
&i2c0 {
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
@ -144,7 +153,7 @@ &mmc0 {
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-0 = <&scif_clk_pins>, <&scif_clk2_pins>;
pinctrl-names = "default";
avb0_pins: avb0 {
@ -170,6 +179,11 @@ hscif0_pins: hscif0 {
function = "hscif0";
};
hscif2_pins: hscif2 {
groups = "hscif2_data", "hscif2_ctrl";
function = "hscif2";
};
i2c0_pins: i2c0 {
groups = "i2c0";
function = "i2c0";
@ -190,6 +204,11 @@ scif_clk_pins: scif-clk {
groups = "scif_clk";
function = "scif_clk";
};
scif_clk2_pins: scif-clk2 {
groups = "scif_clk2";
function = "scif_clk2";
};
};
&rpc {
@ -228,3 +247,7 @@ &rwdt {
&scif_clk {
clock-frequency = <24000000>;
};
&scif_clk2 {
clock-frequency = <24000000>;
};

311
arch/arm64/boot/dts/renesas/r8a779h0.dtsi
View File

@ -144,13 +144,19 @@ psci {
method = "smc";
};
/* External SCIF clock - to be overridden by boards that provide it */
/* External SCIF clocks - to be overridden by boards that provide them */
scif_clk: scif-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
scif_clk2: scif-clk2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
soc: soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@ -297,6 +303,76 @@ gpio7: gpio@e6061980 {
resets = <&cpg 917>;
};
cmt0: timer@e60f0000 {
compatible = "renesas,r8a779h0-cmt0",
"renesas,rcar-gen4-cmt0";
reg = <0 0xe60f0000 0 0x1004>;
interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 910>;
clock-names = "fck";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 910>;
status = "disabled";
};
cmt1: timer@e6130000 {
compatible = "renesas,r8a779h0-cmt1",
"renesas,rcar-gen4-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 911>;
clock-names = "fck";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 911>;
status = "disabled";
};
cmt2: timer@e6140000 {
compatible = "renesas,r8a779h0-cmt1",
"renesas,rcar-gen4-cmt1";
reg = <0 0xe6140000 0 0x1004>;
interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 912>;
clock-names = "fck";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 912>;
status = "disabled";
};
cmt3: timer@e6148000 {
compatible = "renesas,r8a779h0-cmt1",
"renesas,rcar-gen4-cmt1";
reg = <0 0xe6148000 0 0x1004>;
interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 913>;
clock-names = "fck";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 913>;
status = "disabled";
};
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a779h0-cpg-mssr";
reg = <0 0xe6150000 0 0x4000>;
@ -318,6 +394,90 @@ sysc: system-controller@e6180000 {
#power-domain-cells = <1>;
};
tsc: thermal@e6198000 {
compatible = "renesas,r8a779h0-thermal";
reg = <0 0xe6198000 0 0x200>,
<0 0xe61a0000 0 0x200>;
clocks = <&cpg CPG_MOD 919>;
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 919>;
#thermal-sensor-cells = <1>;
};
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 713>;
clock-names = "fck";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 713>;
status = "disabled";
};
tmu1: timer@e6fc0000 {
compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
reg = <0 0xe6fc0000 0 0x30>;
interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 714>;
clock-names = "fck";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 714>;
status = "disabled";
};
tmu2: timer@e6fd0000 {
compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
reg = <0 0xe6fd0000 0 0x30>;
interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 715>;
clock-names = "fck";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 715>;
status = "disabled";
};
tmu3: timer@e6fe0000 {
compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
reg = <0 0xe6fe0000 0 0x30>;
interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 716>;
clock-names = "fck";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 716>;
status = "disabled";
};
tmu4: timer@ffc00000 {
compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
reg = <0 0xffc00000 0 0x30>;
interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 717>;
clock-names = "fck";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 717>;
status = "disabled";
};
i2c0: i2c@e6500000 {
compatible = "renesas,i2c-r8a779h0",
"renesas,rcar-gen4-i2c";
@ -403,6 +563,57 @@ hscif0: serial@e6540000 {
status = "disabled";
};
hscif1: serial@e6550000 {
compatible = "renesas,hscif-r8a779h0",
"renesas,rcar-gen4-hscif", "renesas,hscif";
reg = <0 0xe6550000 0 0x60>;
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 515>,
<&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 515>;
dmas = <&dmac1 0x33>, <&dmac1 0x32>,
<&dmac2 0x33>, <&dmac2 0x32>;
dma-names = "tx", "rx", "tx", "rx";
status = "disabled";
};
hscif2: serial@e6560000 {
compatible = "renesas,hscif-r8a779h0",
"renesas,rcar-gen4-hscif", "renesas,hscif";
reg = <0 0xe6560000 0 0x60>;
interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 516>,
<&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
<&scif_clk2>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 516>;
dmas = <&dmac1 0x35>, <&dmac1 0x34>,
<&dmac2 0x35>, <&dmac2 0x34>;
dma-names = "tx", "rx", "tx", "rx";
status = "disabled";
};
hscif3: serial@e66a0000 {
compatible = "renesas,hscif-r8a779h0",
"renesas,rcar-gen4-hscif", "renesas,hscif";
reg = <0 0xe66a0000 0 0x60>;
interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 517>,
<&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 517>;
dmas = <&dmac1 0x37>, <&dmac1 0x36>,
<&dmac2 0x37>, <&dmac2 0x36>;
dma-names = "tx", "rx", "tx", "rx";
status = "disabled";
};
avb0: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a779h0",
"renesas,etheravb-rcar-gen4";
@ -547,6 +758,74 @@ avb2: ethernet@e6820000 {
status = "disabled";
};
scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a779h0",
"renesas,rcar-gen4-scif", "renesas,scif";
reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 702>,
<&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 702>;
dmas = <&dmac1 0x51>, <&dmac1 0x50>,
<&dmac2 0x51>, <&dmac2 0x50>;
dma-names = "tx", "rx", "tx", "rx";
status = "disabled";
};
scif1: serial@e6e68000 {
compatible = "renesas,scif-r8a779h0",
"renesas,rcar-gen4-scif", "renesas,scif";
reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>,
<&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 703>;
dmas = <&dmac1 0x53>, <&dmac1 0x52>,
<&dmac2 0x53>, <&dmac2 0x52>;
dma-names = "tx", "rx", "tx", "rx";
status = "disabled";
};
scif3: serial@e6c50000 {
compatible = "renesas,scif-r8a779h0",
"renesas,rcar-gen4-scif", "renesas,scif";
reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 704>,
<&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 704>;
dmas = <&dmac1 0x57>, <&dmac1 0x56>,
<&dmac2 0x57>, <&dmac2 0x56>;
dma-names = "tx", "rx", "tx", "rx";
status = "disabled";
};
scif4: serial@e6c40000 {
compatible = "renesas,scif-r8a779h0",
"renesas,rcar-gen4-scif", "renesas,scif";
reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 705>,
<&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
<&scif_clk2>;
clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 705>;
dmas = <&dmac1 0x59>, <&dmac1 0x58>,
<&dmac2 0x59>, <&dmac2 0x58>;
dma-names = "tx", "rx", "tx", "rx";
status = "disabled";
};
dmac1: dma-controller@e7350000 {
compatible = "renesas,dmac-r8a779h0",
"renesas,rcar-gen4-dmac";
@ -653,6 +932,36 @@ prr: chipid@fff00044 {
};
};
thermal-zones {
sensor_thermal_cr52: sensor1-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsc 0>;
trips {
sensor1_crit: sensor1-crit {
temperature = <120000>;
hysteresis = <1000>;
type = "critical";
};
};
};
sensor_thermal_ca76: sensor2-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsc 1>;
trips {
sensor2_crit: sensor2-crit {
temperature = <120000>;
hysteresis = <1000>;
type = "critical";
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,

58
arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
View File

@ -5,6 +5,7 @@
* Copyright (C) 2022 Renesas Electronics Corp.
*/
#include <dt-bindings/gpio/gpio.h>
#include "rzg2ul-smarc-pinfunction.dtsi"
#include "rz-smarc-common.dtsi"
@ -23,6 +24,63 @@ &cpu_dai {
&i2c0 {
clock-frequency = <400000>;
da9062: pmic@58 {
compatible = "dlg,da9062";
reg = <0x58>;
gpio-controller;
#gpio-cells = <2>;
gpio {
compatible = "dlg,da9062-gpio";
};
onkey {
compatible = "dlg,da9062-onkey";
};
pmic-good-hog {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PMIC_PGOOD";
};
rtc {
compatible = "dlg,da9062-rtc";
};
sd0-pwr-sel-hog {
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;
input;
line-name = "SD0_PWR_SEL";
};
sd1-pwr-sel-hog {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
input;
line-name = "SD1_PWR_SEL";
};
sw-et0-en-hog {
gpio-hog;
gpios = <3 GPIO_ACTIVE_HIGH>;
input;
line-name = "SW_ET0_EN#";
};
thermal {
compatible = "dlg,da9062-thermal";
status = "disabled";
};
watchdog {
compatible = "dlg,da9062-watchdog";
status = "disabled";
};
};
versa3: clock-generator@68 {
compatible = "renesas,5p35023";
reg = <0x68>;

4
arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
View File

@ -36,8 +36,8 @@ aliases {
#if SW_CONFIG3 == SW_OFF
mmc2 = &sdhi2;
#else
eth0 = &eth0;
eth1 = &eth1;
ethernet0 = &eth0;
ethernet1 = &eth1;
#endif
};

4
include/dt-bindings/clock/r8a73a4-clock.h
View File

@ -24,6 +24,10 @@
#define R8A73A4_CLK_ZS 14
#define R8A73A4_CLK_HP 15
/* MSTP1 */
#define R8A73A4_CLK_TMU0 25
#define R8A73A4_CLK_TMU3 21
/* MSTP2 */
#define R8A73A4_CLK_DMAC 18
#define R8A73A4_CLK_SCIFB3 17