ARM: dts: at91: sama7g5-ek: use blocks 0 and 1 of TCB0 as cs and ce

Use blocks 0 and 1 of TCB0 for clocksource and clockevent functionality.
PIT64B is already enabled on SAMA7G5 targets for this but TCB0 will be
used as a fallback only in case PIT64B will fail to probe.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211020094656.3343242-4-claudiu.beznea@microchip.com
This commit is contained in:
Claudiu Beznea 2021-10-20 12:46:56 +03:00 committed by Nicolas Ferre
parent 9430ff3438
commit f3c0366411

View File

@ -654,6 +654,18 @@ &spdiftx {
status = "okay";
};
&tcb0 {
timer0: timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer1: timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
&trng {
status = "okay";
};