From f3b562367850ac897dcf2eba6e76894b5da81007 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 15 Jun 2026 19:24:02 -0400 Subject: [PATCH] drm/amdgpu/mes11: drop all BUG()s There's no need to crash the kernel for these cases. Reviewed-by: Kent Russell Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 27 +++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c index b72da75dd851..553f9d39add8 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c @@ -86,7 +86,7 @@ static void mes_v11_0_ring_set_wptr(struct amdgpu_ring *ring) ring->wptr); WDOORBELL64(ring->doorbell_index, ring->wptr); } else { - BUG(); + dev_warn_once(adev->dev, "%s requires doorbell!\n", __func__); } } @@ -97,12 +97,15 @@ static u64 mes_v11_0_ring_get_rptr(struct amdgpu_ring *ring) static u64 mes_v11_0_ring_get_wptr(struct amdgpu_ring *ring) { + struct amdgpu_device *adev = ring->adev; u64 wptr; - if (ring->use_doorbell) + if (ring->use_doorbell) { wptr = atomic64_read((atomic64_t *)ring->wptr_cpu_addr); - else - BUG(); + } else { + dev_warn_once(adev->dev, "%s requires doorbell!\n", __func__); + wptr = 0; + } return wptr; } @@ -294,8 +297,8 @@ static int convert_to_mes_queue_type(int queue_type) else if (queue_type == AMDGPU_RING_TYPE_SDMA) return MES_QUEUE_TYPE_SDMA; else - BUG(); - return -1; + WARN(1, "Invalid queue type %d\n", queue_type); + return MES_QUEUE_TYPE_GFX; } static int convert_to_mes_priority_level(int priority_level) @@ -1599,12 +1602,14 @@ static int mes_v11_0_queue_init(struct amdgpu_device *adev, struct amdgpu_ring *ring; int r; - if (pipe == AMDGPU_MES_KIQ_PIPE) + if (pipe == AMDGPU_MES_KIQ_PIPE) { ring = &adev->gfx.kiq[0].ring; - else if (pipe == AMDGPU_MES_SCHED_PIPE) + } else if (pipe == AMDGPU_MES_SCHED_PIPE) { ring = &adev->mes.ring[0]; - else - BUG(); + } else { + WARN(1, "Invalid MES pipe %d\n", pipe); + return -EINVAL; + } if ((pipe == AMDGPU_MES_SCHED_PIPE) && (amdgpu_in_reset(adev) || adev->in_suspend)) { @@ -1687,7 +1692,7 @@ static int mes_v11_0_mqd_sw_init(struct amdgpu_device *adev, else if (pipe == AMDGPU_MES_SCHED_PIPE) ring = &adev->mes.ring[0]; else - BUG(); + return -EINVAL; if (ring->mqd_obj) return 0;