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arm64: dts: ti: k3-j784s4-main: Add DT node for UFS

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Add UFS support present in J784S4 SOC.

UFS is documented in J784S4 TRM[1]
Section 12.3.7 'Universal Flash Storage (UFS) Interface'

[1] http://www.ti.com/lit/zip/spruj52

Cc: Chai Wenle <Wenle.Chai@windriver.com>
Tested-by: Chai Wenle <Wenle.Chai@windriver.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230725133607.2021379-2-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Udit Kumar 2023-07-25 19:06:06 +05:30 committed by Nishanth Menon
parent 99e7172db1
commit f33f5e4c80
1 changed files with 24 additions and 0 deletions
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24
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
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@ -1370,6 +1370,30 @@ main_spi7: spi@2170000 {
status = "disabled";
};
ufs_wrapper: ufs-wrapper@4e80000 {
compatible = "ti,j721e-ufs";
reg = <0x00 0x4e80000 0x00 0x100>;
power-domains = <&k3_pds 387 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 387 3>;
assigned-clocks = <&k3_clks 387 3>;
assigned-clock-parents = <&k3_clks 387 6>;
ranges;
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
ufs@4e84000 {
compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
reg = <0x00 0x4e84000 0x00 0x10000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
freq-table-hz = <250000000 250000000>, <19200000 19200000>,
<19200000 19200000>;
clocks = <&k3_clks 387 1>, <&k3_clks 387 3>, <&k3_clks 387 3>;
clock-names = "core_clk", "phy_clk", "ref_clk";
dma-coherent;
};
};
main_r5fss0: r5fss@5c00000 {
compatible = "ti,j721s2-r5fss";
ti,cluster-mode = <1>;