Qualcomm clock fixes for v7.1

The parking of shared RCGs during registration parks the MDP source
 clock, disabling display until the msm display driver successfully
 initializes the hardware again. Mark this clock on Makena and Hamoa as
 "no_init_park" to retain a working recovery console etc.
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmoVtn8OHGJqb3JuQGty
 eW8uc2UACgkQCx85Pw2ZrcUbpQ//TActv7od06SYTkqfSWwm2YDSoQzex9VxD1ur
 Rf/Dy3kgiC9H2XFp3uQLhbv4SuEFUChFKPyx0HVo3jo+hSnDFot8pmjUIgqmhCxK
 J63UqpuiAoGrJv8X0Sxuv+f3v1WTsUs54ktQtdoxXdvFr4E/Bn59yu3eMYIOu/Ja
 SqkND14pusNgS291xJ4lilxolkk5YNn9w0k7YvJlQxYW5RIaSS6YN3a7ZSE0mBxI
 /CWt8+VwQxO46TT0zIbOf3TlQD7s5ohoWGZUsj4UQ9EgSlw04Fbu/SeGuaHhF63I
 PtmtEon2w9W1oQxalBMV4bc4faga/bOAaY1fNwSps7YzNzs4isEXgRBEJp/NUadr
 wbzlvJ8OzBVVOWuHF3rdMx2lJ3DyA/WyhN76w2ax2Gs+Zp+VC249T0CYjO05TGpT
 t5CCPiyf03KeNJOMx+oLoolSqazNR6jGxN88Guy2I1b9AWGd+APD5YSyRW0ML3ij
 yEqCa93zKkzDHRG1Y062c13w9ubrt7jb/KQWQtD2iUhRi8U2eq3eUXVt4PViPEuk
 jjHk80byXIgXikYl+SmBtAzAyz2WKHN+8IPlCAuuMRV65MA5sgbKHGd97x8vIjGY
 MXmfC5CNCzctnqkg7TTzaNYZbz+91QFWI9PhcbtdqxtWV/aQTN+GTeQ+RBiQi97R
 Aqsx8gU=
 =ksiP
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmoY6j4UHHN3Ym95ZEBj
 aHJvbWl1bS5vcmcACgkQrQKIl8bklSVVkQ/+OuqDZ2rS1exRwSn7nrN8YWcGFNIf
 hu1q5bCoEtiJnWtYzz4emdoQeusOqsUqzK44HdIc1ccKeXl939QPWDDFWdKiDO/e
 x9qZBgZIuslU1wHbGstMaDKjkLcLdL/01vQIr2RC2enh16muYzWl4kSe9E/uDdX+
 D4eJ15hNnhA0CqY+O38QAE+fKBFj73GL4f7OVaUfG2aHozHolk0zs4p4n4r4WeVF
 JCh+1dv5wpP8BCOwKf0K5CcxjW5JD13Kw3zph2HyGvC8tiBKXdQZsOtHjeoKIJlU
 A0aWpRdwQGnK8c2IwMRAvo14k/qgNO263uxCwtOWRTSnmhqyCvG1+4rhG/doe/JV
 aaQchtFqsL/nbM3/TQMrlA+og2nZuHtkdz+VWX8TsaCIFRUmrHt5MxgP5SGXuST2
 oXWa3k/t3G9X1LgiPsdx6TSLaW4SfGyh00i7t1SJvY7vrpylArN7WLPjHSI/5u+G
 zA4BI5YtmDRdtPAkycSx9tD2g9wmsO0tvci9Fr/lKDISVcy0/BgYgQiujNI3SWgk
 p3li4pF9oRZoj9I/0i481Y3Gm+wvLRqLgaSh8kks6w/qiXGE18TyslJJQUTy3JUq
 BovFu/HKgm1pktpKZYMGC9EfxpFJRr2NLnCojdYEeEFnRUxp7LpyfoHlce9Ef6Jw
 XIIZKMeukgOFT3A=
 =6x3K
 -----END PGP SIGNATURE-----

Merge tag 'qcom-clk-fixes-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-fixes

Pull Qualcomm clk driver fixes from Bjorn Andersson:

The parking of shared RCGs during registration parks the MDP source
clock, disabling display until the msm display driver successfully
initializes the hardware again. Mark this clock on Makena and Hamoa as
"no_init_park" to retain a working recovery console etc.

* tag 'qcom-clk-fixes-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  clk: qcom: dispcc-sc8280xp: Don't park mdp_clk_src at registration time
  clk: qcom: x1e80100-dispcc: Stop disp_cc_mdss_mdp_clk_src from getting parked
This commit is contained in:
Stephen Boyd 2026-05-28 18:21:54 -07:00
commit f29a24c947
2 changed files with 3 additions and 3 deletions

View File

@ -977,7 +977,7 @@ static struct clk_rcg2 disp0_cc_mdss_mdp_clk_src = {
.name = "disp0_cc_mdss_mdp_clk_src",
.parent_data = disp0_cc_parent_data_5,
.num_parents = ARRAY_SIZE(disp0_cc_parent_data_5),
.ops = &clk_rcg2_shared_ops,
.ops = &clk_rcg2_shared_no_init_park_ops,
},
};
@ -991,7 +991,7 @@ static struct clk_rcg2 disp1_cc_mdss_mdp_clk_src = {
.name = "disp1_cc_mdss_mdp_clk_src",
.parent_data = disp1_cc_parent_data_5,
.num_parents = ARRAY_SIZE(disp1_cc_parent_data_5),
.ops = &clk_rcg2_shared_ops,
.ops = &clk_rcg2_shared_no_init_park_ops,
},
};

View File

@ -580,7 +580,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = {
.parent_data = disp_cc_parent_data_6,
.num_parents = ARRAY_SIZE(disp_cc_parent_data_6),
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_rcg2_shared_ops,
.ops = &clk_rcg2_shared_no_init_park_ops,
},
};