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ARM: dts: aspeed: Add NVIDIA MSX4 HPM
The NVIDIA MSX4 HPM (host platform module) is a reference board for managing up to 8 PCIe connected NVIDIA GPUs via ConnectX-8 (CX8) SuperNICs. The BMC manages all GPUs and CX8s for both telemetry and firmware update via MCTP over USB. The host CPUs are dual socket Intel Granite Rapids processors. For more detail on this architecture: https://developer.nvidia.com/blog/nvidia-connectx-8-supernics-advance-ai-platform-architecture-with-pcie-gen6-connectivity/ Signed-off-by: Marc Olberding <molberding@nvidia.com> Link: https://patch.msgid.link/20251126-msx1_devicetree-v5-2-e508d13e2dda@nvidia.com [arj: Reflow text to wrap at limit, whitespace, grammar] Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
This commit is contained in:
Marc Olberding
Andrew Jeffery
parent
1daabbd6ff
commit
f28674fab3
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@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
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aspeed-bmc-lenovo-hr855xg2.dtb \
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aspeed-bmc-microsoft-olympus.dtb \
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aspeed-bmc-nvidia-gb200nvl-bmc.dtb \
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aspeed-bmc-nvidia-msx4-bmc.dtb \
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aspeed-bmc-opp-lanyang.dtb \
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aspeed-bmc-opp-mowgli.dtb \
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aspeed-bmc-opp-nicole.dtb \
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246
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts
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246
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts
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@ -0,0 +1,246 @@
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// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include "aspeed-g6.dtsi"
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#include <dt-bindings/gpio/aspeed-gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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model = "AST2600 MSX4 BMC";
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compatible = "nvidia,msx4-bmc", "aspeed,ast2600";
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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};
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chosen {
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stdout-path = "uart5:115200n8";
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x80000000>;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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gfx_memory: framebuffer {
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compatible = "shared-dma-pool";
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size = <0x01000000>;
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alignment = <0x01000000>;
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reusable;
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};
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video_engine_memory: jpegbuffer {
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compatible = "shared-dma-pool";
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size = <0x02000000>; /* 32M */
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alignment = <0x01000000>;
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reusable;
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};
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};
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};
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&ehci1 {
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status = "okay";
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};
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&fmc {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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label = "bmc";
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status = "okay";
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#include "openbmc-flash-layout-128.dtsi"
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};
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flash@1 {
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compatible = "jedec,spi-nor";
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label = "alt-bmc";
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <1>;
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status = "okay";
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};
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};
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&gfx {
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memory-region = <&gfx_memory>;
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status = "okay";
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};
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&gpio0 {
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gpio-line-names =
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/*A0-A7*/ "","","","","","","","",
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/*B0-B7*/ "ASSERT_BMC_READY","","","","","","","",
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/*C0-C7*/ "MON_PWR_GOOD","","","","","","","FP_ID_LED_N",
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/*D0-D7*/ "","","","","","","","",
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/*E0-E7*/ "","","","","","","","",
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/*F0-F7*/ "","","","","","","","",
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/*G0-G7*/ "","","FP_LED_STATUS_GREEN_N","FP_LED_STATUS_AMBER_N",
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"","","","",
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/*H0-H7*/ "","","","","","","","",
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/*I0-I7*/ "","","","","","","","",
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/*J0-J7*/ "","","","","","","","",
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/*K0-K7*/ "","","","","","","","",
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/*L0-L7*/ "","","","","","","","",
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/*M0-M7*/ "","","","","","","","",
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/*N0-N7*/ "","","","","","","","",
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/*O0-O7*/ "","","","","","","","",
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/*P0-P7*/ "MON_PWR_BTN_L","ASSERT_PWR_BTN_L","MON_RST_BTN_L",
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"ASSERT_RST_BTN_L","","ASSERT_NMI_BTN_L","","",
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/*Q0-Q7*/ "","","MEMORY_HOT_0","MEMORY_HOT_1","","","","",
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/*R0-R7*/ "ID_BTN","","","","","VBAT_GPIO","","",
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/*S0-S7*/ "","","RST_PCA_MUX","","","","","",
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/*T0-T7*/ "","","","","","","","",
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/*U0-U7*/ "","","","","","","","",
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/*V0-V7*/ "","","","","","","","",
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/*W0-W7*/ "","","","","","","","",
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/*X0-X7*/ "","","","","","","","",
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/*Y0-Y7*/ "","","","","","","","",
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/*Z0-Z7*/ "","","","","","","","";
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};
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&gpio1 {
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gpio-line-names =
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/*18A0-18A7*/ "","","","","","","","",
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/*18B0-18B7*/ "","","","","","","","",
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/*18C0-18C7*/ "","","","","","","","",
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/*18D0-18D7*/ "","","","","","","","",
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/*18E0-18E3*/ "","","BMC_INIT_DONE","";
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};
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// Devices on these busses are available after POST
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// however there isn't a great way to defer probing
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// until that point today, as the BMC doesn't
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// have direct control over when the host completes
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// POST, especially from the kernel.
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&i2c0 {
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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};
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&i2c2 {
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status = "okay";
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};
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&i2c3 {
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status = "okay";
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};
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&i2c4 {
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status = "okay";
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eeprom@51 {
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compatible = "atmel,24c256";
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reg = <0x51>;
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pagesize = <64>;
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label = "sku";
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};
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};
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&i2c5 {
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status = "okay";
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};
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&i2c6 {
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status = "okay";
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};
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&i2c7 {
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status = "okay";
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};
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&i2c8 {
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status = "okay";
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};
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&i2c9 {
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status = "okay";
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};
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&i2c10 {
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status = "okay";
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};
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&i2c11 {
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status = "okay";
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};
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&i2c12 {
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status = "okay";
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};
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&i2c13 {
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status = "okay";
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};
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&i2c15 {
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status = "okay";
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};
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&kcs1 {
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aspeed,lpc-io-reg = <0xca0>;
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status = "okay";
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};
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&kcs2 {
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aspeed,lpc-io-reg = <0xca8>;
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status = "okay";
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};
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&kcs3 {
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aspeed,lpc-io-reg = <0xca2>;
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status = "okay";
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};
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&lpc_reset {
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status = "okay";
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};
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&rtc {
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status = "okay";
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};
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&sgpiom0 {
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ngpios = <80>;
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status = "okay";
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};
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&uart_routing {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&uart3 {
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status = "okay";
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};
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&uart4 {
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status = "okay";
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};
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&uart5 {
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status = "okay";
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};
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&video {
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memory-region = <&video_engine_memory>;
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status = "okay";
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};
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