arm64: dts: renesas: r9a09g047e57-smarc: Enable CANFD

Enable CANFD on the RZ/G3E SMARC EVK platform.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250320164121.193857-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2025-03-20 16:41:17 +00:00 committed by Geert Uytterhoeven
parent 9c1d49dd09
commit f2858ea240
3 changed files with 46 additions and 3 deletions

View File

@ -8,6 +8,8 @@
/dts-v1/;
/* Switch selection settings */
#define SW_LCD_EN 0
#define SW_PDM_EN 0
#define SW_SD0_DEV_SEL 0
#define SW_SDIO_M2E 0
@ -33,7 +35,36 @@ vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd {
};
};
&canfd {
pinctrl-0 = <&canfd_pins>;
pinctrl-names = "default";
#if (!SW_PDM_EN)
channel1 {
status = "okay";
};
#endif
#if (!SW_LCD_EN)
channel4 {
status = "okay";
};
#endif
};
&pinctrl {
canfd_pins: canfd {
can1_pins: can1 {
pinmux = <RZG3E_PORT_PINMUX(L, 2, 3)>, /* RX */
<RZG3E_PORT_PINMUX(L, 3, 3)>; /* TX */
};
can4_pins: can4 {
pinmux = <RZG3E_PORT_PINMUX(5, 2, 3)>, /* RX */
<RZG3E_PORT_PINMUX(5, 3, 3)>; /* TX */
};
};
scif_pins: scif {
pins = "SCIF_TXD", "SCIF_RXD";
renesas,output-impedance = <1>;

View File

@ -29,6 +29,10 @@ aliases {
};
};
&canfd {
status = "okay";
};
&scif0 {
status = "okay";
};

View File

@ -6,12 +6,20 @@
*/
/*
* Please set the switch position SYS.1 on the SoM and the corresponding macro
* SW_SD0_DEV_SEL on the board DTS:
* Please set the below switch position on the SoM and the corresponding macro
* on the board DTS:
*
* SW_SD0_DEV_SEL:
* Switch position SYS.1, Macro SW_SD0_DEV_SEL:
* 0 - SD0 is connected to eMMC (default)
* 1 - SD0 is connected to uSD0 card
*
* Switch position SYS.5, Macro SW_LCD_EN:
* 0 - Select Misc. Signals routing
* 1 - Select LCD
*
* Switch position BOOT.6, Macro SW_PDM_EN:
* 0 - Select CAN routing
* 1 - Select PDM
*/
/ {