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arm64: dts: renesas: r9a09g047e57-smarc: Enable CANFD
Enable CANFD on the RZ/G3E SMARC EVK platform. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250320164121.193857-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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9c1d49dd09
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f2858ea240
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@ -8,6 +8,8 @@
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/dts-v1/;
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/* Switch selection settings */
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#define SW_LCD_EN 0
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#define SW_PDM_EN 0
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#define SW_SD0_DEV_SEL 0
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#define SW_SDIO_M2E 0
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@ -33,7 +35,36 @@ vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd {
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};
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};
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&canfd {
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pinctrl-0 = <&canfd_pins>;
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pinctrl-names = "default";
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#if (!SW_PDM_EN)
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channel1 {
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status = "okay";
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};
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#endif
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#if (!SW_LCD_EN)
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channel4 {
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status = "okay";
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};
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#endif
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};
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&pinctrl {
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canfd_pins: canfd {
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can1_pins: can1 {
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pinmux = <RZG3E_PORT_PINMUX(L, 2, 3)>, /* RX */
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<RZG3E_PORT_PINMUX(L, 3, 3)>; /* TX */
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};
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can4_pins: can4 {
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pinmux = <RZG3E_PORT_PINMUX(5, 2, 3)>, /* RX */
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<RZG3E_PORT_PINMUX(5, 3, 3)>; /* TX */
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};
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};
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scif_pins: scif {
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pins = "SCIF_TXD", "SCIF_RXD";
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renesas,output-impedance = <1>;
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@ -29,6 +29,10 @@ aliases {
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};
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};
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&canfd {
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status = "okay";
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};
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&scif0 {
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status = "okay";
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};
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@ -6,12 +6,20 @@
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*/
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/*
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* Please set the switch position SYS.1 on the SoM and the corresponding macro
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* SW_SD0_DEV_SEL on the board DTS:
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* Please set the below switch position on the SoM and the corresponding macro
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* on the board DTS:
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*
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* SW_SD0_DEV_SEL:
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* Switch position SYS.1, Macro SW_SD0_DEV_SEL:
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* 0 - SD0 is connected to eMMC (default)
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* 1 - SD0 is connected to uSD0 card
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*
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* Switch position SYS.5, Macro SW_LCD_EN:
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* 0 - Select Misc. Signals routing
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* 1 - Select LCD
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*
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* Switch position BOOT.6, Macro SW_PDM_EN:
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* 0 - Select CAN routing
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* 1 - Select PDM
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*/
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/ {
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