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clk: qcom: gcc-ipq6018: update sdcc max clock frequency

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The mmc controller of the IPQ6018 does not support HS400 mode.
So adjust the maximum clock frequency of sdcc to 200 MHz (HS200).

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240620150122.1406631-2-amadeus@jmu.edu.cn
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Chukun Pan 2024-06-20 23:01:21 +08:00 committed by Bjorn Andersson
parent 03675e398b
commit f2743ae3ff
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/qcom/gcc-ipq6018.c
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@ -1617,7 +1617,7 @@ static const struct freq_tbl ftbl_sdcc_apps_clk_src[] = {
F(96000000, P_GPLL2, 12, 0, 0),
F(177777778, P_GPLL0, 4.5, 0, 0),
F(192000000, P_GPLL2, 6, 0, 0),
F(384000000, P_GPLL2, 3, 0, 0),
F(200000000, P_GPLL0, 4, 0, 0),
{ }
};