soc: fixes for 7.3

The driver fixes are all for simple mistakes: a use-after-free bug
 on Samsung Exynos, error handling and reference counting on Arm SCMI
 firmware and a problem dealing with inconsistent firmware information.
 
 The rest are devicetree fixes for arm64 platforms from Altera, Renesas
 and Amlogic. On the Renesas platform, one patch addresses a boot time
 regression, the rest address minor performance and correctness issues.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmqtProACgkQmmx57+YA
 GNku+BAAsyHGF7f7tniVyH1lDfZ+BY8G0i8856Pgi6xJfwTPcrtxJe15ALFJz5sa
 DRvCmt3fx2e4LmED2wEfTVYr+RIEmlgD27pT8lUvMo4avIcXlIxtAlqCOyKTOALS
 LzOJPD5VaEs/ZKXqqGDPnHzYJNO9DJ18uAuk8yGY7cK4z4IV+aANCJzCN83vhYu2
 OAl37i/0PmaMhHTgLgIugd2uc28GJsyZQiFu9k9hlRWGjn9WpYivSohbF8p8Cqcw
 Eg/TzWVNcTrm95uuHbhaQ3tsYDtBHoy5V7e5w1a4NnJ7ufouW/I1Z9s2OrulWadY
 3Hw/pEtrkWAgK1NMfAaXtErkWUjuKeMRzWwOZ0NR4Zi0Zsdt+VTyDajSLbUEuePI
 AfknmGcrgSIgK/HlSkLw5R0VnYI8duUjnBSDVTKBLMxFnAdBs/vDhr/ZDy8HgLjN
 i+Poe36q6JLTw88/d/uF+2T2HdZXwPiL9tDl16WmAUQOvZOcr6dfQdLZGIb8zwuV
 rghM9rnh7v2Lb5nFsC++MebH2xNw33faWplpnc0WxcUdzov20Wcr7IbdNVzKaVTn
 IcnjnTtCCaxXM9NxyjMrxJ8+tkkFAPyDczSPxcxL3xcOjoQ2nr4XlfPMaYwoV2N7
 siwksezj55bWANuZwxObou3ZJgHHFqO0RYUdtJxDn/mBnWNOq3A=
 =Z5GP
 -----END PGP SIGNATURE-----

Merge tag 'soc-fixes-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann:
 "The driver fixes are all for simple mistakes: a use-after-free bug on
  Samsung Exynos, error handling and reference counting on Arm SCMI
  firmware and a problem dealing with inconsistent firmware information.

  The rest are devicetree fixes for arm64 platforms from Altera, Renesas
  and Amlogic. On the Renesas platform, one patch addresses a boot time
  regression, the rest address minor performance and correctness issues"

* tag 'soc-fixes-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (21 commits)
  soc: samsung: exynos-pmu: fix use-after-free of interrupt generator node
  arm64: dts: renesas: r8a779f0: Set UFS lane count
  firmware: arm_scmi: Fix typo "upto" in comment
  arm64: dts: renesas: r9a09g087: Switch GBETH TX queue scheduling to WRR
  arm64: dts: renesas: r9a09g077: Switch GBETH TX queue scheduling to WRR
  arm64: dts: renesas: r9a09g047: Switch GBETH TX queue scheduling to WRR
  arm64: dts: renesas: r9a09g056: Switch GBETH TX queue scheduling to WRR
  arm64: dts: renesas: r9a09g057: Switch GBETH TX queue scheduling to WRR
  firmware: arm_ffa: Tear down driver during shutdown
  clk: scpi: use PLATFORM_DEVID_NONE for scpi-cpufreq
  clk: scpi: register scpi-cpufreq once and clear on failure
  clk: scpi: bound-check DVFS index in scpi_dvfs_recalc_rate
  firmware: arm_scpi: reject DVFS OPP count above MAX_DVFS_OPPS
  firmware: arm_scpi: fix device_node leak in scpi_dev_domain_id
  arm64: dts: socfpga: change access permission from 755 to 644
  ARM: socfpga: select the PL310 erratum 753970 workaround
  arm64: dts: amlogic: t7: fix the pin groups of the vsync PWM
  arm64: dts: amlogic: t7: khadas-vim4: add the PWM-driven supplies
  arm64: dts: amlogic: t7: fix the pin groups of two PWM outputs
  arm64: dts: amlogic: t7: khadas-vim4: allow the SD card to be power cycled
  ...
This commit is contained in:
Linus Torvalds 2026-09-18 09:34:57 -07:00
commit f259f446f5
17 changed files with 253 additions and 23 deletions

View File

@ -16,7 +16,7 @@ menuconfig ARCH_INTEL_SOCFPGA
select ARM_ERRATA_775420
select PL310_ERRATA_588369
select PL310_ERRATA_727915
select PL310_ERRATA_753970 if PL310
select PL310_ERRATA_753970
select PL310_ERRATA_769419
select RESET_CONTROLLER

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View File

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@ -33,7 +33,7 @@ xtal: xtal-clk {
};
&uart_a {
clocks = <&xtal>, <&xtal>, <&xtal>;
clocks = <&xtal>, <&clkc_periphs CLKID_SYS_UART_A>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
status = "okay";
};

View File

@ -71,7 +71,6 @@ sd_3v3: regulator-sdcard-3v3 {
vin-supply = <&vddao_3v3>;
gpio = <&gpio GPIOD_11 GPIO_ACTIVE_LOW>;
regulator-boot-on;
regulator-always-on;
};
sdio_pwrseq: sdio-pwrseq {
@ -105,6 +104,66 @@ vcc5v0_usb: regulator-vcc-usb {
enable-active-high;
};
vdd_ddr: regulator-vddddr {
/*
* SY8003ADFC Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDDDR";
regulator-min-microvolt = <690000>;
regulator-max-microvolt = <890000>;
pwm-supply = <&dc_in>;
pwms = <&pwm_ao_gh 0 1500 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vdd_ee: regulator-vddee {
/*
* MP8756GD Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDEE";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <922000>;
pwm-supply = <&dc_in>;
pwms = <&pwm_ao_ab 0 1500 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vdd_gpu: regulator-vddgpu {
/*
* SY8003ADFC Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDGPU";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <922000>;
pwm-supply = <&dc_in>;
pwms = <&pwm_ao_ef 0 1500 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vdd_npu: regulator-vddnpu {
/*
* SY8003ADFC Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDNPU";
regulator-min-microvolt = <733000>;
regulator-max-microvolt = <933000>;
pwm-supply = <&dc_in>;
pwms = <&pwm_ao_ef 1 1500 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vddao_1v8: regulator-vddao-1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_1V8";
@ -123,6 +182,36 @@ vddao_3v3: regulator-vddao-3v3 {
regulator-always-on;
};
vddcpu_a: regulator-vddcpu-a {
/*
* MP8756GD Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU_A";
regulator-min-microvolt = <689000>;
regulator-max-microvolt = <1049000>;
pwm-supply = <&dc_in>;
pwms = <&pwm_ao_cd 1 1500 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vddcpu_b: regulator-vddcpu-b {
/*
* MP8756GD Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU_B";
regulator-min-microvolt = <689000>;
regulator-max-microvolt = <1049000>;
pwm-supply = <&dc_in>;
pwms = <&pwm_ao_ab 1 1500 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vddio_1v8: regulator-vddio-1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_1V8";
@ -173,9 +262,27 @@ &pwm_ab {
pinctrl-names = "default";
};
&pwm_ao_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_pins>, <&pwm_ao_b_pins>;
pinctrl-names = "default";
};
&pwm_ao_cd {
status = "okay";
pinctrl-0 = <&pwm_ao_c_d_pins>;
pinctrl-0 = <&pwm_ao_c_d_pins>, <&pwm_ao_d_pins>;
pinctrl-names = "default";
};
&pwm_ao_ef {
status = "okay";
pinctrl-0 = <&pwm_ao_e_pins>, <&pwm_ao_f_pins>;
pinctrl-names = "default";
};
&pwm_ao_gh {
status = "okay";
pinctrl-0 = <&pwm_ao_g_e_pins>;
pinctrl-names = "default";
};
@ -266,6 +373,6 @@ &sd_emmc_c {
&uart_a {
status = "okay";
clocks = <&xtal>, <&xtal>, <&xtal>;
clocks = <&xtal>, <&clkc_periphs CLKID_SYS_UART_A>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};

View File

@ -458,9 +458,25 @@ mux {
};
};
pwm_ao_g_pins: pwm-ao-g {
pwm_ao_g_d11_pins: pwm-ao-g-d11 {
mux {
groups = "pwm_ao_g";
groups = "pwm_ao_g_d11";
function = "pwm_ao_g";
bias-disable;
};
};
pwm_ao_g_d7_pins: pwm-ao-g-d7 {
mux {
groups = "pwm_ao_g_d7";
function = "pwm_ao_g";
bias-disable;
};
};
pwm_ao_g_e_pins: pwm-ao-g-e {
mux {
groups = "pwm_ao_g_e";
function = "pwm_ao_g";
bias-disable;
};
@ -474,9 +490,17 @@ mux {
};
};
pwm_ao_h_pins: pwm-ao-h {
pwm_ao_h_d5_pins: pwm-ao-h-d5 {
mux {
groups = "pwm_ao_h";
groups = "pwm_ao_h_d5";
function = "pwm_ao_h";
bias-disable;
};
};
pwm_ao_h_d10_pins: pwm-ao-h-d10 {
mux {
groups = "pwm_ao_h_d10";
function = "pwm_ao_h";
bias-disable;
};
@ -522,9 +546,17 @@ mux {
};
};
pwm_vs_pins: pwm-vs {
pwm_vs_y_pins: pwm-vs-y {
mux {
groups = "pwm_vs";
groups = "pwm_vs_y";
function = "pwm_vs";
bias-disable;
};
};
pwm_vs_h_pins: pwm-vs-h {
mux {
groups = "pwm_vs_h";
function = "pwm_vs";
bias-disable;
};

View File

@ -901,6 +901,7 @@ ufs: ufs@e6860000 {
clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>;
clock-names = "fck", "ref_clk";
freq-table-hz = <200000000 200000000>, <38400000 38400000>;
lanes-per-direction = <1>;
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
resets = <&cpg 1514>;
status = "disabled";

View File

@ -1913,23 +1913,28 @@ queue3 {
mtl_tx_setup0: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};
@ -2013,23 +2018,28 @@ queue3 {
mtl_tx_setup1: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};

View File

@ -1585,23 +1585,28 @@ queue3 {
mtl_tx_setup0: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};
@ -1686,23 +1691,28 @@ queue3 {
mtl_tx_setup1: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};

View File

@ -1715,23 +1715,28 @@ queue3 {
mtl_tx_setup0: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};
@ -1816,23 +1821,28 @@ queue3 {
mtl_tx_setup1: tx-queues-config {
snps,tx-queues-to-use = <4>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
snps,priority = <0x1>;
};
queue1 {
snps,weight = <0x12>;
snps,dcb-algorithm;
snps,priority = <0x2>;
};
queue2 {
snps,weight = <0x14>;
snps,dcb-algorithm;
snps,priority = <0x4>;
};
queue3 {
snps,weight = <0x18>;
snps,dcb-algorithm;
snps,priority = <0x8>;
};

View File

@ -642,36 +642,45 @@ queue7 {
mtl_tx_setup0: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};
@ -788,36 +797,45 @@ queue7 {
mtl_tx_setup1: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};
@ -934,36 +952,45 @@ queue7 {
mtl_tx_setup2: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};

View File

@ -643,36 +643,45 @@ queue7 {
mtl_tx_setup0: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};
@ -790,36 +799,45 @@ queue7 {
mtl_tx_setup1: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};
@ -937,36 +955,45 @@ queue7 {
mtl_tx_setup2: tx-queues-config {
snps,tx-queues-to-use = <8>;
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
snps,dcb-algorithm;
};
queue1 {
snps,weight = <0x11>;
snps,dcb-algorithm;
};
queue2 {
snps,weight = <0x12>;
snps,dcb-algorithm;
};
queue3 {
snps,weight = <0x13>;
snps,dcb-algorithm;
};
queue4 {
snps,weight = <0x14>;
snps,dcb-algorithm;
};
queue5 {
snps,weight = <0x15>;
snps,dcb-algorithm;
};
queue6 {
snps,weight = <0x16>;
snps,dcb-algorithm;
};
queue7 {
snps,weight = <0x17>;
snps,dcb-algorithm;
};
};

View File

@ -73,7 +73,7 @@ static unsigned long scpi_dvfs_recalc_rate(struct clk_hw *hw,
int idx = clk->scpi_ops->dvfs_get_idx(clk->id);
const struct scpi_opp *opp;
if (idx < 0)
if (idx < 0 || idx >= clk->info->count)
return 0;
opp = clk->info->opps + idx;
@ -272,10 +272,15 @@ static int scpi_clocks_probe(struct platform_device *pdev)
if (match->data != &scpi_dvfs_ops)
continue;
/* Add the virtual cpufreq device if it's DVFS clock provider */
if (cpufreq_dev)
continue;
cpufreq_dev = platform_device_register_simple("scpi-cpufreq",
-1, NULL, 0);
if (IS_ERR(cpufreq_dev))
PLATFORM_DEVID_NONE,
NULL, 0);
if (IS_ERR(cpufreq_dev)) {
pr_warn("unable to register cpufreq device");
cpufreq_dev = NULL;
}
}
return 0;
}

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@ -2225,6 +2225,7 @@ static void ffa_remove(struct platform_device *pdev)
static struct platform_driver ffa_driver = {
.probe = ffa_probe,
.remove = ffa_remove,
.shutdown = ffa_remove,
.driver = {
.name = FFA_PLATFORM_NAME,
},

View File

@ -477,7 +477,7 @@ void *scmi_notification_instance_data_get(const struct scmi_handle *handle)
* - exactly 'next_token' may be NOT available so pick xfer_id >= next_token
* using find_next_zero_bit() starting from candidate next_token bit
*
* - all tokens ahead upto (MSG_TOKEN_ID_MASK - 1) are used in-flight but we
* - all tokens ahead up to (MSG_TOKEN_ID_MASK - 1) are used in-flight but we
* are plenty of free tokens at start, so try a second pass using
* find_next_zero_bit() and starting from 0.
*

View File

@ -631,8 +631,8 @@ static struct scpi_dvfs_info *scpi_dvfs_get_info(u8 domain)
if (ret)
return ERR_PTR(ret);
if (!buf.opp_count)
return ERR_PTR(-ENOENT);
if (!buf.opp_count || buf.opp_count > MAX_DVFS_OPPS)
return ERR_PTR(-EINVAL);
info = kmalloc_obj(*info);
if (!info)
@ -661,12 +661,15 @@ static struct scpi_dvfs_info *scpi_dvfs_get_info(u8 domain)
static int scpi_dev_domain_id(struct device *dev)
{
struct of_phandle_args clkspec;
int domain;
if (of_parse_phandle_with_args(dev->of_node, "clocks", "#clock-cells",
0, &clkspec))
return -EINVAL;
return clkspec.args[0];
domain = clkspec.args[0];
of_node_put(clkspec.np);
return domain;
}
static struct scpi_dvfs_info *scpi_dvfs_info(struct device *dev)

View File

@ -409,13 +409,12 @@ static struct notifier_block exynos_cpupm_reboot_nb = {
static int setup_cpuhp_and_cpuidle(struct device *dev)
{
struct device_node *intr_gen_node;
struct device_node *intr_gen_node __free(device_node) =
of_parse_phandle(dev->of_node, "google,pmu-intr-gen-syscon", 0);
struct resource intrgen_res;
void __iomem *virt_addr;
int ret, cpu;
intr_gen_node = of_parse_phandle(dev->of_node,
"google,pmu-intr-gen-syscon", 0);
if (!intr_gen_node) {
/*
* To maintain support for older DTs that didn't specify syscon
@ -431,8 +430,6 @@ static int setup_cpuhp_and_cpuidle(struct device *dev)
* syscon provided regmap.
*/
ret = of_address_to_resource(intr_gen_node, 0, &intrgen_res);
of_node_put(intr_gen_node);
virt_addr = devm_ioremap(dev, intrgen_res.start,
resource_size(&intrgen_res));
if (!virt_addr)