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dt-bindings: clock: Add Amlogic A9 SCMI clock controller

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Add the SCMI clock controller dt-bindings for the Amlogic A9 SoC family.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Link: https://patch.msgid.link/20260917-a9_scmi-v3-1-5ad843766774@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
This commit is contained in:
Jian Hu 2026-09-17 16:39:09 +08:00 committed by Jerome Brunet
parent 43e1705eca
commit f25652a1c0
1 changed files with 51 additions and 0 deletions
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51
include/dt-bindings/clock/amlogic,a9-scmi-clkc.h Normal file
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (C) 2026 Amlogic, Inc. All rights reserved.
*/
#ifndef __AMLOGIC_A9_SCMI_CLKC_H
#define __AMLOGIC_A9_SCMI_CLKC_H
#define CLKID_GP0_PLL_OSC 0
#define CLKID_GP1_PLL_OSC 1
#define CLKID_HIFI_PLL_OSC 2
#define CLKID_GP2_PLL_OSC 3
#define CLKID_MCLK_PLL_OSC 4
#define CLKID_FIXED_PLL 5
#define CLKID_FCLK_50M_PREDIV 6
#define CLKID_FCLK_50M_DIV 7
#define CLKID_FCLK_50M 8
#define CLKID_FCLK_DIV2_DIV 9
#define CLKID_FCLK_DIV2 10
#define CLKID_FCLK_DIV2P5_DIV 11
#define CLKID_FCLK_DIV2P5 12
#define CLKID_FCLK_DIV3_DIV 13
#define CLKID_FCLK_DIV3 14
#define CLKID_FCLK_DIV4_DIV 15
#define CLKID_FCLK_DIV4 16
#define CLKID_FCLK_DIV5_DIV 17
#define CLKID_FCLK_DIV5 18
#define CLKID_FCLK_DIV7_DIV 19
#define CLKID_FCLK_DIV7 20
#define CLKID_SYS_CLK 21
#define CLKID_SYS_AO_SYS 22
#define CLKID_SYS_MMC_APB 23
#define CLKID_SYS_CPU_APB 24
#define CLKID_SYS_GIC 25
#define CLKID_AXI_CLK 26
#define CLKID_AXI_SYS_NIC 27
#define CLKID_AXI_RAMA 28
#define CLKID_CPU_CLK 29
#define CLKID_A78_CLK 30
#define CLKID_DSU_CLK 31
#define CLKID_ACLKM 32
#define CLKID_GP1_PLL 33
#define CLKID_GP2_PLL 34
#define CLKID_SYS_PLL_DIV16 35
#define CLKID_CPU_CLK_DIV16 36
#define CLKID_A78_CLK_DIV16 37
#define CLKID_DSU_CLK_DIV16 38
#define CLKID_GIC_CLK 39
#define CLKID_RTC 40
#endif /* __AMLOGIC_A9_SCMI_CLKC_H */