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usb: xhci: Simplify xhci_quiesce()
The function reads USBCMD, clears some bits and writes it back. Its treatment of the Run bit is weird: the bit is usually written as 0, as we would expect, but it may also be written as 1 if both its current value and USBSTS.HCHalted are observed as 1. Per xHCI 5.4.2, HCHalted is 0 whenever Run is 1, so the above can only happen due to buggy HW or SW, e.g. concurrent xhci_quiesce() and xhci_start() execution. It's unclear why we should treat such cases specially and write the bit as 1. The logic comes from original PoC implementation and has never been explained. Just write 0 every time, which looks like the safer choice when the intent is to stop the xHC. We could get in trouble if clearing Run causes some very broken xHC to start running after it was halted, but no such case has been documented. It seems the logic was just poorly thought out. Signed-off-by: Michal Pecio <michal.pecio@gmail.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Link: https://patch.msgid.link/20260603091132.1110849-4-mathias.nyman@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -102,17 +102,10 @@ int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, u64 timeout_us)
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*/
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void xhci_quiesce(struct xhci_hcd *xhci)
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{
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u32 halted;
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u32 cmd;
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u32 mask;
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mask = ~(XHCI_IRQS);
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halted = readl(&xhci->op_regs->status) & STS_HALT;
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if (!halted)
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mask &= ~CMD_RUN;
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cmd = readl(&xhci->op_regs->command);
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cmd &= mask;
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cmd &= ~(CMD_RUN | XHCI_IRQS);
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writel(cmd, &xhci->op_regs->command);
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}
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