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Freescale QSPI device tree cleanup for 4.21:
- It contains a series from Schrempf Frieder that cleans up FSL QSPI
device tree nodes. The current device trees are broken because they
use an inconsistent scheme for assigning the reg properties. It
becomes a problem with ongoing QSPI driver under SPI framework. So
the cleanup is a preparation for new driver landing in the next
cycle.
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Merge tag 'imx-qspi-dt-clean' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Freescale QSPI device tree cleanup for 4.21:
- It contains a series from Schrempf Frieder that cleans up FSL QSPI
device tree nodes. The current device trees are broken because they
use an inconsistent scheme for assigning the reg properties. It
becomes a problem with ongoing QSPI driver under SPI framework. So
the cleanup is a preparation for new driver landing in the next
cycle.
* tag 'imx-qspi-dt-clean' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
arm64: dts: Remove unused properties from FSL QSPI driver nodes
ARM: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
ARM: dts: imx6sx-sdb: Fix the reg properties for the FSL QSPI nodes
ARM: dts: Remove unused properties from FSL QSPI driver nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
f1a6caf73c
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@ -128,14 +128,18 @@ flash0: s25fl128s@0 {
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#size-cells = <1>;
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compatible = "spansion,s25fl128s", "jedec,spi-nor";
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spi-max-frequency = <66000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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};
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flash1: s25fl128s@1 {
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reg = <1>;
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flash1: s25fl128s@2 {
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reg = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spansion,s25fl128s", "jedec,spi-nor";
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spi-max-frequency = <66000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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};
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};
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@ -113,15 +113,19 @@ flash0: n25q256a@0 {
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#size-cells = <1>;
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compatible = "micron,n25q256a", "jedec,spi-nor";
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spi-max-frequency = <29000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <0>;
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};
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flash1: n25q256a@1 {
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flash1: n25q256a@2 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "micron,n25q256a", "jedec,spi-nor";
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spi-max-frequency = <29000000>;
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reg = <1>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <2>;
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};
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};
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@ -217,6 +217,8 @@ flash0: n25q256a@0 {
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#size-cells = <1>;
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compatible = "micron,n25q256a";
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spi-max-frequency = <29000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <0>;
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};
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};
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@ -203,9 +203,6 @@ rgmii_phy2: ethernet-phy@2 {
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};
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&qspi {
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bus-num = <0>;
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fsl,spi-num-chipselects = <2>;
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fsl,spi-flash-chipselects = <0>;
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fsl,qspi-has-second-chip;
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status = "okay";
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@ -214,6 +211,8 @@ flash: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <0>;
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partitions@0 {
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@ -135,7 +135,6 @@ &lpuart0 {
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};
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&qspi {
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bus-num = <0>;
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status = "okay";
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qflash0: s25fl128s@0 {
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@ -143,6 +142,8 @@ qflash0: s25fl128s@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <0>;
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};
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};
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@ -163,8 +163,6 @@ &lpuart0 {
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};
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&qspi {
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num-cs = <2>;
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bus-num = <0>;
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status = "okay";
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qflash0: s25fl128s@0 {
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@ -172,6 +170,8 @@ qflash0: s25fl128s@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <0>;
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};
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};
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@ -99,8 +99,6 @@ cpld: board-control@2,0 {
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};
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&qspi {
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num-cs = <2>;
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bus-num = <0>;
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status = "okay";
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qflash0: s25fs512s@0 {
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@ -108,6 +106,8 @@ qflash0: s25fs512s@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <0>;
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};
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@ -116,6 +116,8 @@ qflash1: s25fs512s@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <1>;
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};
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};
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@ -134,6 +134,8 @@ flash0: s25fl256s1@0 {
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <0>;
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};
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flash2: s25fl256s1@2 {
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@ -141,6 +143,8 @@ flash2: s25fl256s1@2 {
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#size-cells = <1>;
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compatible = "st,m25p80";
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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reg = <2>;
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};
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};
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