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ARM: dts: wpcm450: Add global control registers (GCR) node

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The Global Control Registers (GCR) are a block of registers in Nuvoton
SoCs that expose misc functionality such as chip model and version
information or pinmux settings.

This patch adds a GCR node to nuvoton-wpcm450.dtsi in preparation for
enabling pinctrl on this SoC.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20220129115228.2257310-4-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
This commit is contained in:
Jonathan Neuschäfer 2022-01-29 12:52:22 +01:00 committed by Joel Stanley
parent 2e26d833c6
commit f14a58097e
1 changed files with 5 additions and 0 deletions
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5
arch/arm/boot/dts/nuvoton-wpcm450.dtsi
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@ -33,6 +33,11 @@ soc {
interrupt-parent = <&aic>;
ranges;
gcr: syscon@b0000000 {
compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd";
reg = <0xb0000000 0x200>;
};
serial0: serial@b8000000 {
compatible = "nuvoton,wpcm450-uart";
reg = <0xb8000000 0x20>;