arm64: dts: qcom: glymur: Add EVA clock controller node

Add the device node for the EVA clock controller (evacc) for Qualcomm
Glymur SoC. This clock controller provides clocks and resets to the
EVA hardware block.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260617-evacc_glymur-v2-4-905108dacaaa@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Taniya Das 2026-06-17 16:37:55 +05:30 committed by Bjorn Andersson
parent 0fc66307d1
commit f135aa4dc1

View File

@ -4,6 +4,7 @@
*/
#include <dt-bindings/clock/qcom,glymur-dispcc.h>
#include <dt-bindings/clock/qcom,glymur-evacc.h>
#include <dt-bindings/clock/qcom,glymur-gcc.h>
#include <dt-bindings/clock/qcom,glymur-gpucc.h>
#include <dt-bindings/clock/qcom,glymur-tcsr.h>
@ -5319,6 +5320,23 @@ videocc: clock-controller@aaf0000 {
#power-domain-cells = <1>;
};
evacc: clock-controller@abf0000 {
compatible = "qcom,glymur-evacc";
reg = <0x0 0x0abf0000 0x0 0x10000>;
clocks = <&gcc GCC_EVA_AHB_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&sleep_clk>;
power-domains = <&rpmhpd RPMHPD_MMCX>,
<&rpmhpd RPMHPD_MXC>;
required-opps = <&rpmhpd_opp_low_svs>,
<&rpmhpd_opp_low_svs>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
dispcc: clock-controller@af00000 {
compatible = "qcom,glymur-dispcc";
reg = <0x0 0x0af00000 0x0 0x20000>;