github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-07-29 10:41:49 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

net/mlx5: qos: Add ifc support for cross-esw scheduling

Browse Source 
This adds the capability bit and the vport element fields related to
cross-esw scheduling.

Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20241204220931.254964-5-tariqt@nvidia.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
This commit is contained in:
Cosmin Ratiu 2024-12-05 00:09:24 +02:00 committed by Leon Romanovsky
parent 03713108e0
commit f09ed834a9
1 changed files with 8 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
include/linux/mlx5/mlx5_ifc.h
View File

@ -1095,7 +1095,9 @@ struct mlx5_ifc_qos_cap_bits {
u8 log_esw_max_sched_depth[0x4];
u8 reserved_at_10[0x10];
u8 reserved_at_20[0xb];
u8 reserved_at_20[0x9];
u8 esw_cross_esw_sched[0x1];
u8 reserved_at_2a[0x1];
u8 log_max_qos_nic_queue_group[0x5];
u8 reserved_at_30[0x10];
@ -4139,13 +4141,16 @@ struct mlx5_ifc_tsar_element_bits {
};
struct mlx5_ifc_vport_element_bits {
u8 reserved_at_0[0x10];
u8 reserved_at_0[0x4];
u8 eswitch_owner_vhca_id_valid[0x1];
u8 eswitch_owner_vhca_id[0xb];
u8 vport_number[0x10];
};
struct mlx5_ifc_vport_tc_element_bits {
u8 traffic_class[0x4];
u8 reserved_at_4[0xc];
u8 eswitch_owner_vhca_id_valid[0x1];
u8 eswitch_owner_vhca_id[0xb];
u8 vport_number[0x10];
};