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drm/vc4: hdmi: Add more checks for 4k resolutions

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At least the 4096x2160@60Hz mode requires some overclocking that isn't
available by default, even if hdmi_enable_4kp60 is enabled.

Let's add some logic to detect whether we can satisfy the core clock
requirements for that mode, and prevent it from being used otherwise.

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://lore.kernel.org/r/20220815-rpi-fix-4k-60-v5-6-fe9e7ac8b111@cerno.tech
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
This commit is contained in:
Dom Cobley 2022-10-27 14:52:46 +02:00 committed by Maxime Ripard
parent 2a001ca00a
commit f09e172da8
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GPG Key ID: E3EF0D6F671851C5
3 changed files with 18 additions and 2 deletions
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6
drivers/gpu/drm/vc4/vc4_drv.h
View File

@ -347,6 +347,12 @@ struct vc4_hvs {
* available.
*/
bool vc5_hdmi_enable_hdmi_20;
/*
* 4096x2160@60 requires a core overclock to work, so register
* whether that is sufficient.
*/
bool vc5_hdmi_enable_4096by2160;
};
struct vc4_plane {

11
drivers/gpu/drm/vc4/vc4_hdmi.c
View File

@ -1753,6 +1753,7 @@ vc4_hdmi_sink_supports_format_bpc(const struct vc4_hdmi *vc4_hdmi,
static enum drm_mode_status
vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi,
const struct drm_display_mode *mode,
unsigned long long clock)
{
const struct drm_connector *connector = &vc4_hdmi->connector;
@ -1765,6 +1766,12 @@ vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi,
if (!vc4->hvs->vc5_hdmi_enable_hdmi_20 && clock > HDMI_14_MAX_TMDS_CLK)
return MODE_CLOCK_HIGH;
/* 4096x2160@60 is not reliable without overclocking core */
if (!vc4->hvs->vc5_hdmi_enable_4096by2160 &&
mode->hdisplay > 3840 && mode->vdisplay >= 2160 &&
drm_mode_vrefresh(mode) >= 50)
return MODE_CLOCK_HIGH;
if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000))
return MODE_CLOCK_HIGH;
@ -1799,7 +1806,7 @@ vc4_hdmi_encoder_compute_clock(const struct vc4_hdmi *vc4_hdmi,
unsigned long long clock;
clock = vc4_hdmi_encoder_compute_mode_clock(mode, bpc, fmt);
if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, clock) != MODE_OK)
if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode, clock) != MODE_OK)
return -EINVAL;
vc4_state->tmds_char_rate = clock;
@ -1962,7 +1969,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_encoder *encoder,
(mode->hsync_end % 2) || (mode->htotal % 2)))
return MODE_H_ILLEGAL;
return vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode->clock * 1000);
return vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode, mode->clock * 1000);
}
static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = {

3
drivers/gpu/drm/vc4/vc4_hvs.c
View File

@ -818,6 +818,9 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
if (max_rate >= 550000000)
hvs->vc5_hdmi_enable_hdmi_20 = true;
if (max_rate >= 600000000)
hvs->vc5_hdmi_enable_4096by2160 = true;
hvs->max_core_rate = max_rate;
ret = clk_prepare_enable(hvs->core_clk);