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scsi: ufs: ufs-qcom: Enable only lane clocks in lane clock APIs
ufs_qcom_enable_lane_clks() and ufs_qcom_disable_lane_clks() currently use clk_bulk_prepare_enable()/clk_bulk_disable_unprepare() on the entire host->clks array obtained from devm_clk_bulk_get_all(). This array contains all device clocks, not just lane symbol clocks. Since the UFS core framework already manages the non-lane clocks via the setup_clocks callback, the bulk enable/disable in the lane clock APIs resulted in duplicate reference count increments on those shared clocks. The extra enable counts were never balanced by a corresponding disable from the framework's clock gating path, preventing the clock reference counts from reaching zero and ultimately blocking CXO shutdown during low-power states. Fix this by restricting the lane clock APIs to only prepare/enable and disable/unprepare the three lane symbol clocks (tx_lane0_sync_clk, rx_lane0_sync_clk, rx_lane1_sync_clk), leaving the handling of all other clocks to the UFS core framework. The lane clocks are now acquired individually via devm_clk_get() instead of being looked up in the bulk clock array. Signed-off-by: Nitin Rawat <nitin.rawat@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Link: https://patch.msgid.link/20260909053944.2827968-1-nitin.rawat@oss.qualcomm.com Signed-off-by: Martin K. Petersen (Oracle) <mkp@kernel.org>
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@ -347,7 +347,9 @@ static void ufs_qcom_disable_lane_clks(struct ufs_qcom_host *host)
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if (!host->is_lane_clks_enabled)
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return;
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clk_bulk_disable_unprepare(host->num_clks, host->clks);
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clk_disable_unprepare(host->rx_lane1_sync_clk);
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clk_disable_unprepare(host->rx_lane0_sync_clk);
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clk_disable_unprepare(host->tx_lane0_sync_clk);
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host->is_lane_clks_enabled = false;
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}
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@ -356,28 +358,57 @@ static int ufs_qcom_enable_lane_clks(struct ufs_qcom_host *host)
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{
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int err;
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err = clk_bulk_prepare_enable(host->num_clks, host->clks);
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if (host->is_lane_clks_enabled)
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return 0;
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err = clk_prepare_enable(host->tx_lane0_sync_clk);
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if (err)
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return err;
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goto out;
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err = clk_prepare_enable(host->rx_lane0_sync_clk);
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if (err)
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goto out_disable_tx_lane0;
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err = clk_prepare_enable(host->rx_lane1_sync_clk);
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if (err)
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goto out_disable_rx_lane0;
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host->is_lane_clks_enabled = true;
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return 0;
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out_disable_rx_lane0:
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clk_disable_unprepare(host->rx_lane0_sync_clk);
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out_disable_tx_lane0:
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clk_disable_unprepare(host->tx_lane0_sync_clk);
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out:
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return err;
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}
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static int ufs_qcom_init_lane_clks(struct ufs_qcom_host *host)
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{
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int err;
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struct device *dev = host->hba->dev;
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if (has_acpi_companion(dev))
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return 0;
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err = devm_clk_bulk_get_all(dev, &host->clks);
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if (err <= 0)
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return err;
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host->tx_lane0_sync_clk = devm_clk_get(dev, "tx_lane0_sync_clk");
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if (IS_ERR(host->tx_lane0_sync_clk))
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return dev_err_probe(dev, PTR_ERR(host->tx_lane0_sync_clk),
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"failed to get tx_lane0_sync_clk\n");
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host->num_clks = err;
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host->rx_lane0_sync_clk = devm_clk_get(dev, "rx_lane0_sync_clk");
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if (IS_ERR(host->rx_lane0_sync_clk))
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return dev_err_probe(dev, PTR_ERR(host->rx_lane0_sync_clk),
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"failed to get rx_lane0_sync_clk\n");
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/* In case of single lane per direction, don't read lane1 clocks */
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if (host->hba->lanes_per_direction > 1) {
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host->rx_lane1_sync_clk = devm_clk_get(dev, "rx_lane1_sync_clk");
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if (IS_ERR(host->rx_lane1_sync_clk))
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return dev_err_probe(dev, PTR_ERR(host->rx_lane1_sync_clk),
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"failed to get rx_lane1_sync_clk\n");
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}
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return 0;
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}
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@ -330,8 +330,9 @@ struct ufs_qcom_host {
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struct phy *generic_phy;
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struct ufs_hba *hba;
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struct ufs_pa_layer_attr dev_req_params;
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struct clk_bulk_data *clks;
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u32 num_clks;
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struct clk *tx_lane0_sync_clk;
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struct clk *rx_lane0_sync_clk;
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struct clk *rx_lane1_sync_clk;
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bool is_lane_clks_enabled;
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struct icc_path *icc_ddr;
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