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arm64: perf: Consistently make all event numbers as 16-bits
Arm ARM documents PMU event numbers as 16-bits in the table and more 0x4XXX events have been added in the header file, so use 16-bits for all event numbers and make them consistent. No functional change intended. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Link: https://lore.kernel.org/r/20220303100710.2238-1-zhangshaokun@hisilicon.com Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
Shaokun Zhang
Will Deacon
parent
83f83cc0c1
commit
f00f367487
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@ -15,70 +15,70 @@
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/*
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* Common architectural and microarchitectural event numbers.
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*/
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#define ARMV8_PMUV3_PERFCTR_SW_INCR 0x00
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#define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x01
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#define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x02
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#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x03
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#define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x04
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#define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x05
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#define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x06
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#define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x07
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#define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x08
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#define ARMV8_PMUV3_PERFCTR_EXC_TAKEN 0x09
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#define ARMV8_PMUV3_PERFCTR_EXC_RETURN 0x0A
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#define ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED 0x0B
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#define ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED 0x0C
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#define ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED 0x0D
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#define ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED 0x0E
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#define ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED 0x0F
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#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED 0x10
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#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES 0x11
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#define ARMV8_PMUV3_PERFCTR_BR_PRED 0x12
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#define ARMV8_PMUV3_PERFCTR_MEM_ACCESS 0x13
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#define ARMV8_PMUV3_PERFCTR_L1I_CACHE 0x14
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#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB 0x15
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#define ARMV8_PMUV3_PERFCTR_L2D_CACHE 0x16
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#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL 0x17
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#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB 0x18
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#define ARMV8_PMUV3_PERFCTR_BUS_ACCESS 0x19
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#define ARMV8_PMUV3_PERFCTR_MEMORY_ERROR 0x1A
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#define ARMV8_PMUV3_PERFCTR_INST_SPEC 0x1B
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#define ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED 0x1C
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#define ARMV8_PMUV3_PERFCTR_BUS_CYCLES 0x1D
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#define ARMV8_PMUV3_PERFCTR_CHAIN 0x1E
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#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE 0x1F
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#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE 0x20
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#define ARMV8_PMUV3_PERFCTR_BR_RETIRED 0x21
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#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED 0x22
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#define ARMV8_PMUV3_PERFCTR_STALL_FRONTEND 0x23
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#define ARMV8_PMUV3_PERFCTR_STALL_BACKEND 0x24
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#define ARMV8_PMUV3_PERFCTR_L1D_TLB 0x25
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#define ARMV8_PMUV3_PERFCTR_L1I_TLB 0x26
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#define ARMV8_PMUV3_PERFCTR_L2I_CACHE 0x27
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#define ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL 0x28
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#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE 0x29
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#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL 0x2A
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#define ARMV8_PMUV3_PERFCTR_L3D_CACHE 0x2B
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#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_WB 0x2C
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#define ARMV8_PMUV3_PERFCTR_L2D_TLB_REFILL 0x2D
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#define ARMV8_PMUV3_PERFCTR_L2I_TLB_REFILL 0x2E
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#define ARMV8_PMUV3_PERFCTR_L2D_TLB 0x2F
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#define ARMV8_PMUV3_PERFCTR_L2I_TLB 0x30
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#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS 0x31
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#define ARMV8_PMUV3_PERFCTR_LL_CACHE 0x32
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#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS 0x33
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#define ARMV8_PMUV3_PERFCTR_DTLB_WALK 0x34
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#define ARMV8_PMUV3_PERFCTR_ITLB_WALK 0x35
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#define ARMV8_PMUV3_PERFCTR_LL_CACHE_RD 0x36
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#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS_RD 0x37
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#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS_RD 0x38
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#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_LMISS_RD 0x39
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#define ARMV8_PMUV3_PERFCTR_OP_RETIRED 0x3A
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#define ARMV8_PMUV3_PERFCTR_OP_SPEC 0x3B
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#define ARMV8_PMUV3_PERFCTR_STALL 0x3C
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#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_BACKEND 0x3D
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#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND 0x3E
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#define ARMV8_PMUV3_PERFCTR_STALL_SLOT 0x3F
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#define ARMV8_PMUV3_PERFCTR_SW_INCR 0x0000
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#define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x0001
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#define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x0002
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#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x0003
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#define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x0004
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#define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x0005
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#define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x0006
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#define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x0007
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#define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x0008
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#define ARMV8_PMUV3_PERFCTR_EXC_TAKEN 0x0009
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#define ARMV8_PMUV3_PERFCTR_EXC_RETURN 0x000A
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#define ARMV8_PMUV3_PERFCTR_CID_WRITE_RETIRED 0x000B
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#define ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED 0x000C
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#define ARMV8_PMUV3_PERFCTR_BR_IMMED_RETIRED 0x000D
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#define ARMV8_PMUV3_PERFCTR_BR_RETURN_RETIRED 0x000E
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#define ARMV8_PMUV3_PERFCTR_UNALIGNED_LDST_RETIRED 0x000F
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#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED 0x0010
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#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES 0x0011
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#define ARMV8_PMUV3_PERFCTR_BR_PRED 0x0012
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#define ARMV8_PMUV3_PERFCTR_MEM_ACCESS 0x0013
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#define ARMV8_PMUV3_PERFCTR_L1I_CACHE 0x0014
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#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_WB 0x0015
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#define ARMV8_PMUV3_PERFCTR_L2D_CACHE 0x0016
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#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_REFILL 0x0017
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#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_WB 0x0018
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#define ARMV8_PMUV3_PERFCTR_BUS_ACCESS 0x0019
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#define ARMV8_PMUV3_PERFCTR_MEMORY_ERROR 0x001A
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#define ARMV8_PMUV3_PERFCTR_INST_SPEC 0x001B
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#define ARMV8_PMUV3_PERFCTR_TTBR_WRITE_RETIRED 0x001C
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#define ARMV8_PMUV3_PERFCTR_BUS_CYCLES 0x001D
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#define ARMV8_PMUV3_PERFCTR_CHAIN 0x001E
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#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_ALLOCATE 0x001F
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#define ARMV8_PMUV3_PERFCTR_L2D_CACHE_ALLOCATE 0x0020
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#define ARMV8_PMUV3_PERFCTR_BR_RETIRED 0x0021
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#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED_RETIRED 0x0022
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#define ARMV8_PMUV3_PERFCTR_STALL_FRONTEND 0x0023
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#define ARMV8_PMUV3_PERFCTR_STALL_BACKEND 0x0024
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#define ARMV8_PMUV3_PERFCTR_L1D_TLB 0x0025
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#define ARMV8_PMUV3_PERFCTR_L1I_TLB 0x0026
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#define ARMV8_PMUV3_PERFCTR_L2I_CACHE 0x0027
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#define ARMV8_PMUV3_PERFCTR_L2I_CACHE_REFILL 0x0028
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#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_ALLOCATE 0x0029
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#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_REFILL 0x002A
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#define ARMV8_PMUV3_PERFCTR_L3D_CACHE 0x002B
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#define ARMV8_PMUV3_PERFCTR_L3D_CACHE_WB 0x002C
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#define ARMV8_PMUV3_PERFCTR_L2D_TLB_REFILL 0x002D
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#define ARMV8_PMUV3_PERFCTR_L2I_TLB_REFILL 0x002E
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#define ARMV8_PMUV3_PERFCTR_L2D_TLB 0x002F
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#define ARMV8_PMUV3_PERFCTR_L2I_TLB 0x0030
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#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS 0x0031
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#define ARMV8_PMUV3_PERFCTR_LL_CACHE 0x0032
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#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS 0x0033
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#define ARMV8_PMUV3_PERFCTR_DTLB_WALK 0x0034
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#define ARMV8_PMUV3_PERFCTR_ITLB_WALK 0x0035
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#define ARMV8_PMUV3_PERFCTR_LL_CACHE_RD 0x0036
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#define ARMV8_PMUV3_PERFCTR_LL_CACHE_MISS_RD 0x0037
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#define ARMV8_PMUV3_PERFCTR_REMOTE_ACCESS_RD 0x0038
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#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_LMISS_RD 0x0039
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#define ARMV8_PMUV3_PERFCTR_OP_RETIRED 0x003A
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#define ARMV8_PMUV3_PERFCTR_OP_SPEC 0x003B
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#define ARMV8_PMUV3_PERFCTR_STALL 0x003C
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#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_BACKEND 0x003D
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#define ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND 0x003E
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#define ARMV8_PMUV3_PERFCTR_STALL_SLOT 0x003F
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/* Statistical profiling extension microarchitectural events */
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#define ARMV8_SPE_PERFCTR_SAMPLE_POP 0x4000
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#define ARMV8_MTE_PERFCTR_MEM_ACCESS_CHECKED_WR 0x4026
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/* ARMv8 recommended implementation defined event types */
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD 0x40
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR 0x41
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD 0x42
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR 0x43
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_INNER 0x44
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_OUTER 0x45
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_VICTIM 0x46
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_CLEAN 0x47
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_INVAL 0x48
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_RD 0x0040
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR 0x0041
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD 0x0042
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR 0x0043
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_INNER 0x0044
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_OUTER 0x0045
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_VICTIM 0x0046
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WB_CLEAN 0x0047
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#define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_INVAL 0x0048
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#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD 0x4C
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#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR 0x4D
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#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD 0x4E
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#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR 0x4F
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_RD 0x50
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WR 0x51
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_RD 0x52
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_WR 0x53
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#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD 0x004C
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#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR 0x004D
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#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD 0x004E
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#define ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR 0x004F
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_RD 0x0050
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WR 0x0051
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_RD 0x0052
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_REFILL_WR 0x0053
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_VICTIM 0x56
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_CLEAN 0x57
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_INVAL 0x58
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_VICTIM 0x0056
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_WB_CLEAN 0x0057
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#define ARMV8_IMPDEF_PERFCTR_L2D_CACHE_INVAL 0x0058
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#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_RD 0x5C
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#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_WR 0x5D
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#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_RD 0x5E
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#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_WR 0x5F
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD 0x60
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR 0x61
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_SHARED 0x62
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NOT_SHARED 0x63
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NORMAL 0x64
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_PERIPH 0x65
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#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_RD 0x66
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#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_WR 0x67
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#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LD_SPEC 0x68
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#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_ST_SPEC 0x69
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#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LDST_SPEC 0x6A
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#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_RD 0x005C
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#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_REFILL_WR 0x005D
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#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_RD 0x005E
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#define ARMV8_IMPDEF_PERFCTR_L2D_TLB_WR 0x005F
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD 0x0060
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR 0x0061
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_SHARED 0x0062
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NOT_SHARED 0x0063
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_NORMAL 0x0064
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#define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_PERIPH 0x0065
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#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_RD 0x0066
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#define ARMV8_IMPDEF_PERFCTR_MEM_ACCESS_WR 0x0067
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#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LD_SPEC 0x0068
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#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_ST_SPEC 0x0069
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#define ARMV8_IMPDEF_PERFCTR_UNALIGNED_LDST_SPEC 0x006A
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#define ARMV8_IMPDEF_PERFCTR_LDREX_SPEC 0x6C
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#define ARMV8_IMPDEF_PERFCTR_STREX_PASS_SPEC 0x6D
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#define ARMV8_IMPDEF_PERFCTR_STREX_FAIL_SPEC 0x6E
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#define ARMV8_IMPDEF_PERFCTR_STREX_SPEC 0x6F
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#define ARMV8_IMPDEF_PERFCTR_LD_SPEC 0x70
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#define ARMV8_IMPDEF_PERFCTR_ST_SPEC 0x71
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#define ARMV8_IMPDEF_PERFCTR_LDST_SPEC 0x72
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#define ARMV8_IMPDEF_PERFCTR_DP_SPEC 0x73
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#define ARMV8_IMPDEF_PERFCTR_ASE_SPEC 0x74
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#define ARMV8_IMPDEF_PERFCTR_VFP_SPEC 0x75
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#define ARMV8_IMPDEF_PERFCTR_PC_WRITE_SPEC 0x76
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#define ARMV8_IMPDEF_PERFCTR_CRYPTO_SPEC 0x77
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#define ARMV8_IMPDEF_PERFCTR_BR_IMMED_SPEC 0x78
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#define ARMV8_IMPDEF_PERFCTR_BR_RETURN_SPEC 0x79
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#define ARMV8_IMPDEF_PERFCTR_BR_INDIRECT_SPEC 0x7A
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#define ARMV8_IMPDEF_PERFCTR_LDREX_SPEC 0x006C
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#define ARMV8_IMPDEF_PERFCTR_STREX_PASS_SPEC 0x006D
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#define ARMV8_IMPDEF_PERFCTR_STREX_FAIL_SPEC 0x006E
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#define ARMV8_IMPDEF_PERFCTR_STREX_SPEC 0x006F
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#define ARMV8_IMPDEF_PERFCTR_LD_SPEC 0x0070
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#define ARMV8_IMPDEF_PERFCTR_ST_SPEC 0x0071
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#define ARMV8_IMPDEF_PERFCTR_LDST_SPEC 0x0072
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#define ARMV8_IMPDEF_PERFCTR_DP_SPEC 0x0073
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#define ARMV8_IMPDEF_PERFCTR_ASE_SPEC 0x0074
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#define ARMV8_IMPDEF_PERFCTR_VFP_SPEC 0x0075
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#define ARMV8_IMPDEF_PERFCTR_PC_WRITE_SPEC 0x0076
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#define ARMV8_IMPDEF_PERFCTR_CRYPTO_SPEC 0x0077
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#define ARMV8_IMPDEF_PERFCTR_BR_IMMED_SPEC 0x0078
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#define ARMV8_IMPDEF_PERFCTR_BR_RETURN_SPEC 0x0079
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#define ARMV8_IMPDEF_PERFCTR_BR_INDIRECT_SPEC 0x007A
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#define ARMV8_IMPDEF_PERFCTR_ISB_SPEC 0x7C
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#define ARMV8_IMPDEF_PERFCTR_DSB_SPEC 0x7D
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#define ARMV8_IMPDEF_PERFCTR_DMB_SPEC 0x7E
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#define ARMV8_IMPDEF_PERFCTR_ISB_SPEC 0x007C
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#define ARMV8_IMPDEF_PERFCTR_DSB_SPEC 0x007D
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#define ARMV8_IMPDEF_PERFCTR_DMB_SPEC 0x007E
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#define ARMV8_IMPDEF_PERFCTR_EXC_UNDEF 0x81
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#define ARMV8_IMPDEF_PERFCTR_EXC_SVC 0x82
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#define ARMV8_IMPDEF_PERFCTR_EXC_PABORT 0x83
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#define ARMV8_IMPDEF_PERFCTR_EXC_DABORT 0x84
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#define ARMV8_IMPDEF_PERFCTR_EXC_UNDEF 0x0081
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#define ARMV8_IMPDEF_PERFCTR_EXC_SVC 0x0082
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#define ARMV8_IMPDEF_PERFCTR_EXC_PABORT 0x0083
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#define ARMV8_IMPDEF_PERFCTR_EXC_DABORT 0x0084
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#define ARMV8_IMPDEF_PERFCTR_EXC_IRQ 0x86
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#define ARMV8_IMPDEF_PERFCTR_EXC_FIQ 0x87
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#define ARMV8_IMPDEF_PERFCTR_EXC_SMC 0x88
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#define ARMV8_IMPDEF_PERFCTR_EXC_IRQ 0x0086
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#define ARMV8_IMPDEF_PERFCTR_EXC_FIQ 0x0087
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#define ARMV8_IMPDEF_PERFCTR_EXC_SMC 0x0088
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|
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#define ARMV8_IMPDEF_PERFCTR_EXC_HVC 0x8A
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#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_PABORT 0x8B
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#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_DABORT 0x8C
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||||
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_OTHER 0x8D
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#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_IRQ 0x8E
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#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_FIQ 0x8F
|
||||
#define ARMV8_IMPDEF_PERFCTR_RC_LD_SPEC 0x90
|
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#define ARMV8_IMPDEF_PERFCTR_RC_ST_SPEC 0x91
|
||||
#define ARMV8_IMPDEF_PERFCTR_EXC_HVC 0x008A
|
||||
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_PABORT 0x008B
|
||||
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_DABORT 0x008C
|
||||
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_OTHER 0x008D
|
||||
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_IRQ 0x008E
|
||||
#define ARMV8_IMPDEF_PERFCTR_EXC_TRAP_FIQ 0x008F
|
||||
#define ARMV8_IMPDEF_PERFCTR_RC_LD_SPEC 0x0090
|
||||
#define ARMV8_IMPDEF_PERFCTR_RC_ST_SPEC 0x0091
|
||||
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_RD 0xA0
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WR 0xA1
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_RD 0xA2
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_WR 0xA3
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_RD 0x00A0
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WR 0x00A1
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_RD 0x00A2
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_REFILL_WR 0x00A3
|
||||
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_VICTIM 0xA6
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_CLEAN 0xA7
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_INVAL 0xA8
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_VICTIM 0x00A6
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_WB_CLEAN 0x00A7
|
||||
#define ARMV8_IMPDEF_PERFCTR_L3D_CACHE_INVAL 0x00A8
|
||||
|
||||
/*
|
||||
* Per-CPU PMCR: config reg
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user