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i3c: mipi-i3c-hci: Complete transfer lists immediately on error
In DMA mode, transfer lists are currently completed only when the final transfer in the list completes. If an earlier transfer fails, the list is left incomplete and callers wait until timeout. There is no need to wait for a timeout, as the completion path in i3c_hci_process_xfer() already checks for error status. Complete the transfer list as soon as any transfer in the list reports an error. This avoids unnecessary delays and spurious timeouts on error. Complete a transfer list completion immediately there is an error. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260603090754.16252-8-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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@ -502,6 +502,8 @@ static int hci_dma_queue_xfer(struct i3c_hci *hci,
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struct hci_xfer *xfer = xfer_list + i;
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u32 *ring_data = rh->xfer + rh->xfer_struct_sz * enqueue_ptr;
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xfer->final_xfer = xfer_list + n - 1;
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/* store cmd descriptor */
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*ring_data++ = xfer->cmd_desc[0];
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*ring_data++ = xfer->cmd_desc[1];
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@ -576,8 +578,8 @@ static void hci_dma_xfer_done(struct i3c_hci *hci, struct hci_rh_data *rh)
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tid, xfer->cmd_tid);
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/* TODO: do something about it? */
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}
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if (xfer->completion)
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complete(xfer->completion);
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if (xfer == xfer->final_xfer || RESP_STATUS(resp))
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complete(xfer->final_xfer->completion);
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if (RESP_STATUS(resp))
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hci->enqueue_blocked = true;
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}
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@ -104,6 +104,7 @@ struct hci_xfer {
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struct {
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/* DMA specific */
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struct i3c_dma *dma;
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struct hci_xfer *final_xfer;
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int ring_number;
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int ring_entry;
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};
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