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drm/amdgpu/vcn: set no_user_fence for VCN v2.5 enc/dec rings
VCN encoder and decoder rings do not support 64-bit user fence writes,
reject CS submissions with user fences.
Fixes: 28c17d7207 ("drm/amdgpu: add VCN2.5 basic supports")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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parent
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@ -1778,6 +1778,7 @@ static void vcn_v2_5_dec_ring_set_wptr(struct amdgpu_ring *ring)
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static const struct amdgpu_ring_funcs vcn_v2_5_dec_ring_vm_funcs = {
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.type = AMDGPU_RING_TYPE_VCN_DEC,
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.align_mask = 0xf,
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.no_user_fence = true,
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.secure_submission_supported = true,
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.get_rptr = vcn_v2_5_dec_ring_get_rptr,
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.get_wptr = vcn_v2_5_dec_ring_get_wptr,
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@ -1879,6 +1880,7 @@ static const struct amdgpu_ring_funcs vcn_v2_5_enc_ring_vm_funcs = {
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.type = AMDGPU_RING_TYPE_VCN_ENC,
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.align_mask = 0x3f,
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.nop = VCN_ENC_CMD_NO_OP,
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.no_user_fence = true,
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.get_rptr = vcn_v2_5_enc_ring_get_rptr,
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.get_wptr = vcn_v2_5_enc_ring_get_wptr,
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.set_wptr = vcn_v2_5_enc_ring_set_wptr,
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