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net: ethernet: mtk_eth_soc: fix RSTCTRL_PPE{0,1} definitions
Fix RSTCTRL_PPE0 and RSTCTRL_PPE1 register mask definitions for
MTK_NETSYS_V2.
Remove duplicated definitions.
Fixes: 160d3a9b19 ("net: ethernet: mtk_eth_soc: introduce MTK_NETSYS_V2 support")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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@ -3506,16 +3506,17 @@ static int mtk_hw_init(struct mtk_eth *eth)
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return 0;
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}
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val = RSTCTRL_FE | RSTCTRL_PPE;
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
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regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0);
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val |= RSTCTRL_ETH;
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1))
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val |= RSTCTRL_PPE1;
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val = RSTCTRL_PPE0_V2;
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} else {
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val = RSTCTRL_PPE0;
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}
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ethsys_reset(eth, val);
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1))
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val |= RSTCTRL_PPE1;
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ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | val);
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
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regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN,
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@ -474,18 +474,14 @@
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/* ethernet reset control register */
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#define ETHSYS_RSTCTRL 0x34
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#define RSTCTRL_FE BIT(6)
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#define RSTCTRL_PPE BIT(31)
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#define RSTCTRL_PPE1 BIT(30)
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#define RSTCTRL_PPE0 BIT(31)
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#define RSTCTRL_PPE0_V2 BIT(30)
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#define RSTCTRL_PPE1 BIT(31)
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#define RSTCTRL_ETH BIT(23)
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/* ethernet reset check idle register */
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#define ETHSYS_FE_RST_CHK_IDLE_EN 0x28
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/* ethernet reset control register */
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#define ETHSYS_RSTCTRL 0x34
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#define RSTCTRL_FE BIT(6)
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#define RSTCTRL_PPE BIT(31)
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/* ethernet dma channel agent map */
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#define ETHSYS_DMA_AG_MAP 0x408
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#define ETHSYS_DMA_AG_MAP_PDMA BIT(0)
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