drm/amdgpu: support imu for gc 12_0_0

Support IMU for ASIC with GC 12.0.0

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Likun Gao 2024-04-01 16:57:33 +08:00 committed by Alex Deucher
parent 74ab6253dc
commit ef57158462

View File

@ -32,6 +32,7 @@
#include "gc/gc_12_0_0_sh_mask.h"
#include "mmhub/mmhub_4_1_0_offset.h"
MODULE_FIRMWARE("amdgpu/gc_12_0_0_imu.bin");
MODULE_FIRMWARE("amdgpu/gc_12_0_1_imu.bin");
#define TRANSFER_RAM_MASK 0x001c0000
@ -367,6 +368,7 @@ static void imu_v12_0_program_rlc_ram(struct amdgpu_device *adev)
WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, 0x2);
switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
case IP_VERSION(12, 0, 0):
case IP_VERSION(12, 0, 1):
if (!r)
program_imu_rlc_ram(adev, data, (const u32)size);