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Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux
Tariq Toukan says: ==================== mlx5-next updates 2025-02-24 The following pull-request contains common mlx5 updates for your *net-next* tree. * 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux: net/mlx5: Change POOL_NEXT_SIZE define value and make it global net/mlx5: Add new health syndrome error and crr bit offset ==================== Link: https://patch.msgid.link/20250224212446.523259-1-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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commit
ef4a47a8ab
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@ -96,7 +96,7 @@ static int esw_create_legacy_fdb_table(struct mlx5_eswitch *esw)
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if (!flow_group_in)
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return -ENOMEM;
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ft_attr.max_fte = POOL_NEXT_SIZE;
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ft_attr.max_fte = MLX5_FS_MAX_POOL_SIZE;
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ft_attr.prio = LEGACY_FDB_PRIO;
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fdb = mlx5_create_flow_table(root_ns, &ft_attr);
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if (IS_ERR(fdb)) {
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@ -50,10 +50,12 @@ mlx5_ft_pool_get_avail_sz(struct mlx5_core_dev *dev, enum fs_flow_table_type tab
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int i, found_i = -1;
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for (i = ARRAY_SIZE(FT_POOLS) - 1; i >= 0; i--) {
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if (dev->priv.ft_pool->ft_left[i] && FT_POOLS[i] >= desired_size &&
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if (dev->priv.ft_pool->ft_left[i] &&
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(FT_POOLS[i] >= desired_size ||
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desired_size == MLX5_FS_MAX_POOL_SIZE) &&
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FT_POOLS[i] <= max_ft_size) {
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found_i = i;
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if (desired_size != POOL_NEXT_SIZE)
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if (desired_size != MLX5_FS_MAX_POOL_SIZE)
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break;
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}
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}
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@ -7,8 +7,6 @@
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#include <linux/mlx5/driver.h>
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#include "fs_core.h"
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#define POOL_NEXT_SIZE 0
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int mlx5_ft_pool_init(struct mlx5_core_dev *dev);
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void mlx5_ft_pool_destroy(struct mlx5_core_dev *dev);
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@ -161,7 +161,8 @@ mlx5_chains_create_table(struct mlx5_fs_chains *chains,
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ft_attr.flags |= (MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT |
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MLX5_FLOW_TABLE_TUNNEL_EN_DECAP);
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sz = (chain == mlx5_chains_get_nf_ft_chain(chains)) ? FT_TBL_SZ : POOL_NEXT_SIZE;
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sz = (chain == mlx5_chains_get_nf_ft_chain(chains)) ?
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FT_TBL_SZ : MLX5_FS_MAX_POOL_SIZE;
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ft_attr.max_fte = sz;
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/* We use chains_default_ft(chains) as the table's next_ft till
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@ -538,6 +538,7 @@ struct mlx5_cmd_layout {
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};
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enum mlx5_rfr_severity_bit_offsets {
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MLX5_CRR_BIT_OFFSET = 0x6,
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MLX5_RFR_BIT_OFFSET = 0x7,
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};
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@ -40,6 +40,8 @@
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#define MLX5_SET_CFG(p, f, v) MLX5_SET(create_flow_group_in, p, f, v)
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#define MLX5_FS_MAX_POOL_SIZE BIT(30)
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enum mlx5_flow_destination_type {
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MLX5_FLOW_DESTINATION_TYPE_NONE,
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MLX5_FLOW_DESTINATION_TYPE_VPORT,
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@ -11119,6 +11119,7 @@ enum {
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MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
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MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
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MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PCI_POISONED_ERR = 0x12,
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MLX5_INITIAL_SEG_HEALTH_SYNDROME_TRUST_LOCKDOWN_ERR = 0x13,
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};
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struct mlx5_ifc_initial_seg_bits {
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