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drm/amd/display: Configure all CRC engines in pipe CRC source path

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Iterate every CRC engine instance when enabling or disabling the pipe CRC
source so DCN31x OTG_CRC1_EN is handled alongside OTG_CRC_EN, matching the
legacy shared enable behavior used by DisplayCRC multi-ROI.

Reviewed-by: ChiaHsuan (Tom) Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wayne Lin 2026-07-27 13:45:55 +08:00 committed by Alex Deucher
parent c79354d12c
commit ef45aaf737
2 changed files with 11 additions and 5 deletions
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13
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
View File

@ -604,10 +604,15 @@ int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc,
/* Enable or disable CRTC CRC generation */
if (dm_is_crc_source_crtc(source) || source == AMDGPU_DM_PIPE_CRC_SOURCE_NONE) {
if (!dc_stream_configure_crc(stream_state->ctx->dc,
stream_state, NULL, enable, enable, 0, true, crc_poly_mode)) {
ret = -EINVAL;
goto unlock;
int i;
for (i = 0; i < MAX_CRC_WINDOW_NUM; i++) {
if (!dc_stream_configure_crc(stream_state->ctx->dc,
stream_state, NULL, enable, enable,
i, true, crc_poly_mode)) {
ret = -EINVAL;
goto unlock;
}
}
}

3
drivers/gpu/drm/amd/display/dc/dc_types.h
View File

@ -1045,9 +1045,10 @@ enum backlight_control_type {
BACKLIGHT_CONTROL_AMD_AUX = 2,
};
#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
#define MAX_CRC_WINDOW_NUM 2
#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
struct otg_phy_mux {
uint8_t phy_output_num;
uint8_t otg_output_num;