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ARM: dts: vt8500: Correct indentation

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Correct spaces or mix of tabs+spaces into proper tab-indented lines.
No functional impact (same DTB).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260706101805.341103-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2026-07-06 12:18:06 +02:00 committed by Krzysztof Kozlowski
parent b364559b49
commit eed86f8c39
4 changed files with 85 additions and 85 deletions
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4
arch/arm/boot/dts/vt8500/wm8505.dtsi
View File

@ -21,14 +21,14 @@ cpu@0 {
};
};
aliases {
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
};
};
soc {
#address-cells = <1>;

8
arch/arm/boot/dts/vt8500/wm8650.dtsi
View File

@ -21,7 +21,7 @@ cpu@0 {
};
};
aliases {
aliases {
serial0 = &uart0;
serial1 = &uart1;
};
@ -147,12 +147,12 @@ clkddr: ddr {
};
clkuart0: uart0 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x250>;
enable-bit = <1>;
};
};
clkuart1: uart1 {
#clock-cells = <0>;

104
arch/arm/boot/dts/vt8500/wm8750.dtsi
View File

@ -168,37 +168,37 @@ clkuart1: uart1 {
enable-bit = <25>;
};
clkuart2: uart2 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <26>;
};
clkuart2: uart2 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <26>;
};
clkuart3: uart3 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <27>;
};
clkuart3: uart3 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <27>;
};
clkuart4: uart4 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <28>;
};
clkuart4: uart4 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <28>;
};
clkuart5: uart5 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <29>;
};
clkuart5: uart5 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <29>;
};
clkpwm: pwm {
#clock-cells = <0>;
@ -286,37 +286,37 @@ uart1: serial@d82b0000 {
status = "disabled";
};
uart2: serial@d8210000 {
compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>;
interrupts = <47>;
clocks = <&clkuart2>;
uart2: serial@d8210000 {
compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>;
interrupts = <47>;
clocks = <&clkuart2>;
status = "disabled";
};
};
uart3: serial@d82c0000 {
compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>;
interrupts = <50>;
clocks = <&clkuart3>;
uart3: serial@d82c0000 {
compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>;
interrupts = <50>;
clocks = <&clkuart3>;
status = "disabled";
};
};
uart4: serial@d8370000 {
compatible = "via,vt8500-uart";
reg = <0xd8370000 0x1040>;
interrupts = <30>;
clocks = <&clkuart4>;
uart4: serial@d8370000 {
compatible = "via,vt8500-uart";
reg = <0xd8370000 0x1040>;
interrupts = <30>;
clocks = <&clkuart4>;
status = "disabled";
};
};
uart5: serial@d8380000 {
compatible = "via,vt8500-uart";
reg = <0xd8380000 0x1040>;
interrupts = <43>;
clocks = <&clkuart5>;
uart5: serial@d8380000 {
compatible = "via,vt8500-uart";
reg = <0xd8380000 0x1040>;
interrupts = <43>;
clocks = <&clkuart5>;
status = "disabled";
};
};
rtc@d8100000 {
compatible = "via,vt8500-rtc";

54
arch/arm/boot/dts/vt8500/wm8850.dtsi
View File

@ -179,21 +179,21 @@ clkuart1: uart1 {
enable-bit = <25>;
};
clkuart2: uart2 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <26>;
};
clkuart2: uart2 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <26>;
};
clkuart3: uart3 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <27>;
};
clkuart3: uart3 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x254>;
enable-bit = <27>;
};
clkpwm: pwm {
#clock-cells = <0>;
@ -273,21 +273,21 @@ uart1: serial@d82b0000 {
status = "disabled";
};
uart2: serial@d8210000 {
compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>;
interrupts = <47>;
clocks = <&clkuart2>;
uart2: serial@d8210000 {
compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>;
interrupts = <47>;
clocks = <&clkuart2>;
status = "disabled";
};
};
uart3: serial@d82c0000 {
compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>;
interrupts = <50>;
clocks = <&clkuart3>;
uart3: serial@d82c0000 {
compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>;
interrupts = <50>;
clocks = <&clkuart3>;
status = "disabled";
};
};
rtc@d8100000 {
compatible = "via,vt8500-rtc";
@ -308,7 +308,7 @@ ethernet@d8004000 {
compatible = "via,vt8500-rhine";
reg = <0xd8004000 0x100>;
interrupts = <10>;
};
};
l2_cache: cache-controller@d9000000 {
compatible = "arm,pl310-cache";