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arm64: dts: rp1: Add support for RaspberryPi's RP1 device

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RaspberryPi RP1 is a multi function PCI endpoint device that
exposes several subperipherals via PCI BAR.

Add a dtb overlay that will be compiled into a binary blob
and linked in the RP1 driver.

This overlay offers just minimal support to represent the
RP1 device itself, the sub-peripherals will be added by
future patches.

Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20250529135052.28398-6-andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
This commit is contained in:
Andrea della Porta 2025-05-29 15:50:43 +02:00 committed by Florian Fainelli
parent 1b2fae5b3e
commit eed7414420
2 changed files with 56 additions and 0 deletions
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42
arch/arm64/boot/dts/broadcom/rp1-common.dtsi Normal file
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/raspberrypi,rp1-clocks.h>
pci_ep_bus: pci-ep-bus@1 {
compatible = "simple-bus";
ranges = <0x00 0x40000000 0x01 0x00 0x00000000 0x00 0x00400000>;
dma-ranges = <0x10 0x00000000 0x43000000 0x10 0x00000000 0x10 0x00000000>;
#address-cells = <2>;
#size-cells = <2>;
rp1_clocks: clocks@40018000 {
compatible = "raspberrypi,rp1-clocks";
reg = <0x00 0x40018000 0x0 0x10038>;
#clock-cells = <1>;
clocks = <&clk_rp1_xosc>;
assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>,
<&rp1_clocks RP1_PLL_SYS>,
<&rp1_clocks RP1_PLL_SYS_SEC>,
<&rp1_clocks RP1_CLK_SYS>;
assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE
<200000000>, // RP1_PLL_SYS
<125000000>, // RP1_PLL_SYS_SEC
<200000000>; // RP1_CLK_SYS
};
rp1_gpio: pinctrl@400d0000 {
compatible = "raspberrypi,rp1-gpio";
reg = <0x00 0x400d0000 0x0 0xc000>,
<0x00 0x400e0000 0x0 0xc000>,
<0x00 0x400f0000 0x0 0xc000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>,
<1 IRQ_TYPE_LEVEL_HIGH>,
<2 IRQ_TYPE_LEVEL_HIGH>;
};
};

14
arch/arm64/boot/dts/broadcom/rp1-nexus.dtsi Normal file
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
rp1_nexus {
compatible = "pci1de4,1";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01 0x00 0x00000000
0x02000000 0x00 0x00000000
0x0 0x400000>;
interrupt-controller;
#interrupt-cells = <2>;
#include "rp1-common.dtsi"
};