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FROMLIST: iommu/iova: Support limiting IOVA alignment
When the IOVA framework applies IOVA alignment it aligns all IOVAs to the smallest PAGE_SIZE order which is greater than or equal to the requested IOVA size. We support use cases that requires large buffers (> 64 MB in size) to be allocated and mapped in their stage 1 page tables. However, with this alignment scheme we find ourselves running out of IOVA space for 32 bit devices, so we are proposing this config, along the similar vein as CONFIG_CMA_ALIGNMENT for CMA allocations. Add CONFIG_IOMMU_LIMIT_IOVA_ALIGNMENT to limit the alignment of IOVAs to some desired PAGE_SIZE order, specified by CONFIG_IOMMU_IOVA_ALIGNMENT. This helps reduce the impact of fragmentation caused by the current IOVA alignment scheme, and gives better IOVA space utilization. Bug: 148141615 Link: https://lore.kernel.org/lkml/alpine.DEB.2.10.2002141223510.27047@lmark-linux.qualcomm.com/ Change-Id: I511ac685d5855e1b9feb5025e025ebbebee7f40d Signed-off-by: Liam Mark <lmark@codeaurora.org> Signed-off-by: Chris Goldsworthy <cgoldswo@codeaurora.org>
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@ -11,6 +11,36 @@ config IOASID
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config IOMMU_API
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bool
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if IOMMU_IOVA
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config IOMMU_LIMIT_IOVA_ALIGNMENT
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bool "Limit IOVA alignment"
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help
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When the IOVA framework applies IOVA alignment it aligns all
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IOVAs to the smallest PAGE_SIZE order which is greater than or
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equal to the requested IOVA size. This works fine for sizes up
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to several MiB, but for larger sizes it results in address
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space wastage and fragmentation. For example drivers with a 4
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GiB IOVA space might run out of IOVA space when allocating
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buffers great than 64 MiB.
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Enable this option to impose a limit on the alignment of IOVAs.
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If unsure, say N.
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config IOMMU_IOVA_ALIGNMENT
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int "Maximum PAGE_SIZE order of alignment for IOVAs"
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depends on IOMMU_LIMIT_IOVA_ALIGNMENT
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range 4 9
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default 9
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help
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With this parameter you can specify the maximum PAGE_SIZE order for
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IOVAs. Larger IOVAs will be aligned only to this specified order.
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The order is expressed a power of two multiplied by the PAGE_SIZE.
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If unsure, leave the default value "9".
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endif
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menuconfig IOMMU_SUPPORT
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bool "IOMMU Hardware Support"
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depends on MMU
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@ -178,6 +178,24 @@ iova_insert_rbtree(struct rb_root *root, struct iova *iova,
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rb_insert_color(&iova->node, root);
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}
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#ifdef CONFIG_IOMMU_LIMIT_IOVA_ALIGNMENT
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static unsigned long limit_align_shift(struct iova_domain *iovad,
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unsigned long shift)
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{
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unsigned long max_align_shift;
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max_align_shift = CONFIG_IOMMU_IOVA_ALIGNMENT + PAGE_SHIFT
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- iova_shift(iovad);
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return min_t(unsigned long, max_align_shift, shift);
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}
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#else
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static unsigned long limit_align_shift(struct iova_domain *iovad,
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unsigned long shift)
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{
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return shift;
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}
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#endif
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static int __alloc_and_insert_iova_range(struct iova_domain *iovad,
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unsigned long size, unsigned long limit_pfn,
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struct iova *new, bool size_aligned)
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@ -189,7 +207,7 @@ static int __alloc_and_insert_iova_range(struct iova_domain *iovad,
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unsigned long align_mask = ~0UL;
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if (size_aligned)
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align_mask <<= fls_long(size - 1);
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align_mask <<= limit_align_shift(iovad, fls_long(size - 1));
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/* Walk the tree backwards */
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spin_lock_irqsave(&iovad->iova_rbtree_lock, flags);
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@ -242,7 +260,7 @@ static int __alloc_and_insert_iova_best_fit(struct iova_domain *iovad,
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unsigned long gap, candidate_gap = ~0UL;
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if (size_aligned)
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align_mask <<= limit_align(iovad, fls_long(size - 1));
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align_mask <<= limit_align_shift(iovad, fls_long(size - 1));
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/* Walk the tree backwards */
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spin_lock_irqsave(&iovad->iova_rbtree_lock, flags);
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