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arm64: dts: ti: k3-j721e-main: Remove "syscon" nodes added for pcieX_ctrl

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Remove "syscon" nodes added for pcieX_ctrl and have the PCIe node point
to the parent with an offset argument. This change is as discussed in [1].

[1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210105151421.23237-3-kishon@ti.com
This commit is contained in:
Kishon Vijay Abraham I 2021-01-05 20:44:17 +05:30 committed by Nishanth Menon
parent 0e3cfb8681
commit edb96779f3
1 changed files with 8 additions and 40 deletions
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48
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
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@ -28,38 +28,6 @@ scm_conf: scm-conf@100000 {
#size-cells = <1>;
ranges = <0x0 0x0 0x00100000 0x1c000>;
pcie0_ctrl: syscon@4070 {
compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
reg = <0x00004070 0x4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x4070 0x4070 0x4>;
};
pcie1_ctrl: syscon@4074 {
compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
reg = <0x00004074 0x4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x4074 0x4074 0x4>;
};
pcie2_ctrl: syscon@4078 {
compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
reg = <0x00004078 0x4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x4078 0x4078 0x4>;
};
pcie3_ctrl: syscon@407c {
compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
reg = <0x0000407c 0x4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x407c 0x407c 0x4>;
};
serdes_ln_ctrl: mux@4080 {
compatible = "mmio-mux";
reg = <0x00004080 0x50>;
@ -618,7 +586,7 @@ pcie0_rc: pcie@2900000 {
interrupt-names = "link_state";
interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
device_type = "pci";
ti,syscon-pcie-ctrl = <&pcie0_ctrl>;
ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
@ -645,7 +613,7 @@ pcie0_ep: pcie-ep@2900000 {
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
interrupt-names = "link_state";
interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
ti,syscon-pcie-ctrl = <&pcie0_ctrl>;
ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
@ -666,7 +634,7 @@ pcie1_rc: pcie@2910000 {
interrupt-names = "link_state";
interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
device_type = "pci";
ti,syscon-pcie-ctrl = <&pcie1_ctrl>;
ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
@ -693,7 +661,7 @@ pcie1_ep: pcie-ep@2910000 {
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
interrupt-names = "link_state";
interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
ti,syscon-pcie-ctrl = <&pcie1_ctrl>;
ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
@ -714,7 +682,7 @@ pcie2_rc: pcie@2920000 {
interrupt-names = "link_state";
interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>;
device_type = "pci";
ti,syscon-pcie-ctrl = <&pcie2_ctrl>;
ti,syscon-pcie-ctrl = <&scm_conf 0x4078>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
@ -741,7 +709,7 @@ pcie2_ep: pcie-ep@2920000 {
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
interrupt-names = "link_state";
interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>;
ti,syscon-pcie-ctrl = <&pcie2_ctrl>;
ti,syscon-pcie-ctrl = <&scm_conf 0x4078>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
@ -762,7 +730,7 @@ pcie3_rc: pcie@2930000 {
interrupt-names = "link_state";
interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>;
device_type = "pci";
ti,syscon-pcie-ctrl = <&pcie3_ctrl>;
ti,syscon-pcie-ctrl = <&scm_conf 0x407c>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
@ -789,7 +757,7 @@ pcie3_ep: pcie-ep@2930000 {
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
interrupt-names = "link_state";
interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>;
ti,syscon-pcie-ctrl = <&pcie3_ctrl>;
ti,syscon-pcie-ctrl = <&scm_conf 0x407c>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;