From cfcccc9126a7aece5596bb4cba45ba566fd00f0e Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 21 Feb 2022 16:48:53 +0100 Subject: [PATCH 1/2] arm64: dts: renesas: r8a779f0: Add pinctrl device node Add a device node for the Pin Function Controller on the Renesas R-Car S4-8 (R8A779F0) SoC. Note that the register block does not include registers for banks 4-7, as they can only be accessed from the Control Domain. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda Link: https://lore.kernel.org/r/cf4d261ba1253879e117f1598b9f47798cbda635.1645458249.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi index 0ac8c345558e..f4e549867371 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi @@ -69,6 +69,12 @@ rwdt: watchdog@e6020000 { status = "disabled"; }; + pfc: pinctrl@e6050000 { + compatible = "renesas,pfc-r8a779f0"; + reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, + <0 0xe6051000 0 0x16c>, <0 0xe6051800 0 0x16c>; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a779f0-cpg-mssr"; reg = <0 0xe6150000 0 0x4000>; From 1ef36224ad6283cb1430cd5029470f9c53f6a915 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 21 Feb 2022 16:48:54 +0100 Subject: [PATCH 2/2] arm64: dts: renesas: spider: Complete SCIF3 description Complete the description of the serial console by adding RTS/CTS, the external clock crystal, and pin control. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda Link: https://lore.kernel.org/r/8e5701ca2a5f5925918217ab79e8489535339e7b.1645458249.git.geert+renesas@glider.be --- .../boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi index 3a90932fe85c..6e07c54148e7 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi @@ -31,11 +31,34 @@ &extalr_clk { clock-frequency = <32768>; }; +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + scif3_pins: scif3 { + groups = "scif3_data", "scif3_ctrl"; + function = "scif3"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk"; + function = "scif_clk"; + }; +}; + &rwdt { timeout-sec = <60>; status = "okay"; }; &scif3 { + pinctrl-0 = <&scif3_pins>; + pinctrl-names = "default"; + + uart-has-rtscts; status = "okay"; }; + +&scif_clk { + clock-frequency = <24000000>; +};